1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 /*
3 * Microsemi SoCs pinctrl driver
4 *
5 * Author: <alexandre.belloni@free-electrons.com>
6 * Author: <gregory.clement@bootlin.com>
7 * License: Dual MIT/GPL
8 * Copyright (c) 2017 Microsemi Corporation
9 */
10
11 #include <asm/gpio.h>
12 #include <asm/system.h>
13 #include <config.h>
14 #include <dm.h>
15 #include <dm/device-internal.h>
16 #include <dm/lists.h>
17 #include <dm/pinctrl.h>
18 #include <dm/root.h>
19 #include <errno.h>
20 #include <fdtdec.h>
21 #include <linux/io.h>
22 #include "mscc-common.h"
23
24 enum {
25 FUNC_NONE,
26 FUNC_GPIO,
27 FUNC_IRQ0_IN,
28 FUNC_IRQ0_OUT,
29 FUNC_IRQ1_IN,
30 FUNC_IRQ1_OUT,
31 FUNC_MIIM1,
32 FUNC_PCI_WAKE,
33 FUNC_PTP0,
34 FUNC_PTP1,
35 FUNC_PTP2,
36 FUNC_PTP3,
37 FUNC_PWM,
38 FUNC_RECO_CLK0,
39 FUNC_RECO_CLK1,
40 FUNC_SFP0,
41 FUNC_SFP1,
42 FUNC_SFP2,
43 FUNC_SFP3,
44 FUNC_SFP4,
45 FUNC_SFP5,
46 FUNC_SG0,
47 FUNC_SI,
48 FUNC_TACHO,
49 FUNC_TWI,
50 FUNC_TWI_SCL_M,
51 FUNC_UART,
52 FUNC_UART2,
53 FUNC_MAX
54 };
55
56 static char * const ocelot_function_names[] = {
57 [FUNC_NONE] = "none",
58 [FUNC_GPIO] = "gpio",
59 [FUNC_IRQ0_IN] = "irq0_in",
60 [FUNC_IRQ0_OUT] = "irq0_out",
61 [FUNC_IRQ1_IN] = "irq1_in",
62 [FUNC_IRQ1_OUT] = "irq1_out",
63 [FUNC_MIIM1] = "miim1",
64 [FUNC_PCI_WAKE] = "pci_wake",
65 [FUNC_PTP0] = "ptp0",
66 [FUNC_PTP1] = "ptp1",
67 [FUNC_PTP2] = "ptp2",
68 [FUNC_PTP3] = "ptp3",
69 [FUNC_PWM] = "pwm",
70 [FUNC_RECO_CLK0] = "reco_clk0",
71 [FUNC_RECO_CLK1] = "reco_clk1",
72 [FUNC_SFP0] = "sfp0",
73 [FUNC_SFP1] = "sfp1",
74 [FUNC_SFP2] = "sfp2",
75 [FUNC_SFP3] = "sfp3",
76 [FUNC_SFP4] = "sfp4",
77 [FUNC_SFP5] = "sfp5",
78 [FUNC_SG0] = "sg0",
79 [FUNC_SI] = "si",
80 [FUNC_TACHO] = "tacho",
81 [FUNC_TWI] = "twi",
82 [FUNC_TWI_SCL_M] = "twi_scl_m",
83 [FUNC_UART] = "uart",
84 [FUNC_UART2] = "uart2",
85 };
86
87 MSCC_P(0, SG0, NONE, NONE);
88 MSCC_P(1, SG0, NONE, NONE);
89 MSCC_P(2, SG0, NONE, NONE);
90 MSCC_P(3, SG0, NONE, NONE);
91 MSCC_P(4, IRQ0_IN, IRQ0_OUT, TWI);
92 MSCC_P(5, IRQ1_IN, IRQ1_OUT, PCI_WAKE);
93 MSCC_P(6, UART, TWI_SCL_M, NONE);
94 MSCC_P(7, UART, TWI_SCL_M, NONE);
95 MSCC_P(8, SI, TWI_SCL_M, IRQ0_OUT);
96 MSCC_P(9, SI, TWI_SCL_M, IRQ1_OUT);
97 MSCC_P(10, PTP2, TWI_SCL_M, SFP0);
98 MSCC_P(11, PTP3, TWI_SCL_M, SFP1);
99 MSCC_P(12, UART2, TWI_SCL_M, SFP2);
100 MSCC_P(13, UART2, TWI_SCL_M, SFP3);
101 MSCC_P(14, MIIM1, TWI_SCL_M, SFP4);
102 MSCC_P(15, MIIM1, TWI_SCL_M, SFP5);
103 MSCC_P(16, TWI, NONE, SI);
104 MSCC_P(17, TWI, TWI_SCL_M, SI);
105 MSCC_P(18, PTP0, TWI_SCL_M, NONE);
106 MSCC_P(19, PTP1, TWI_SCL_M, NONE);
107 MSCC_P(20, RECO_CLK0, TACHO, NONE);
108 MSCC_P(21, RECO_CLK1, PWM, NONE);
109
110 #define OCELOT_PIN(n) { \
111 .name = "GPIO_"#n, \
112 .drv_data = &mscc_pin_##n \
113 }
114
115 static const struct mscc_pin_data ocelot_pins[] = {
116 OCELOT_PIN(0),
117 OCELOT_PIN(1),
118 OCELOT_PIN(2),
119 OCELOT_PIN(3),
120 OCELOT_PIN(4),
121 OCELOT_PIN(5),
122 OCELOT_PIN(6),
123 OCELOT_PIN(7),
124 OCELOT_PIN(8),
125 OCELOT_PIN(9),
126 OCELOT_PIN(10),
127 OCELOT_PIN(11),
128 OCELOT_PIN(12),
129 OCELOT_PIN(13),
130 OCELOT_PIN(14),
131 OCELOT_PIN(15),
132 OCELOT_PIN(16),
133 OCELOT_PIN(17),
134 OCELOT_PIN(18),
135 OCELOT_PIN(19),
136 OCELOT_PIN(20),
137 OCELOT_PIN(21),
138 };
139
140 static const unsigned long ocelot_gpios[] = {
141 [MSCC_GPIO_OUT_SET] = 0x00,
142 [MSCC_GPIO_OUT_CLR] = 0x04,
143 [MSCC_GPIO_OUT] = 0x08,
144 [MSCC_GPIO_IN] = 0x0c,
145 [MSCC_GPIO_OE] = 0x10,
146 [MSCC_GPIO_INTR] = 0x14,
147 [MSCC_GPIO_INTR_ENA] = 0x18,
148 [MSCC_GPIO_INTR_IDENT] = 0x1c,
149 [MSCC_GPIO_ALT0] = 0x20,
150 [MSCC_GPIO_ALT1] = 0x24,
151 };
152
ocelot_gpio_probe(struct udevice * dev)153 static int ocelot_gpio_probe(struct udevice *dev)
154 {
155 struct gpio_dev_priv *uc_priv;
156
157 uc_priv = dev_get_uclass_priv(dev);
158 uc_priv->bank_name = "ocelot-gpio";
159 uc_priv->gpio_count = ARRAY_SIZE(ocelot_pins);
160
161 return 0;
162 }
163
164 static struct driver ocelot_gpio_driver = {
165 .name = "ocelot-gpio",
166 .id = UCLASS_GPIO,
167 .probe = ocelot_gpio_probe,
168 .ops = &mscc_gpio_ops,
169 };
170
ocelot_pinctrl_probe(struct udevice * dev)171 int ocelot_pinctrl_probe(struct udevice *dev)
172 {
173 int ret;
174
175 ret = mscc_pinctrl_probe(dev, FUNC_MAX, ocelot_pins,
176 ARRAY_SIZE(ocelot_pins),
177 ocelot_function_names,
178 ocelot_gpios);
179
180 if (ret)
181 return ret;
182
183 ret = device_bind(dev, &ocelot_gpio_driver, "ocelot-gpio", NULL,
184 dev_ofnode(dev), NULL);
185
186 return ret;
187 }
188
189 static const struct udevice_id ocelot_pinctrl_of_match[] = {
190 {.compatible = "mscc,ocelot-pinctrl"},
191 {},
192 };
193
194 U_BOOT_DRIVER(ocelot_pinctrl) = {
195 .name = "ocelot-pinctrl",
196 .id = UCLASS_PINCTRL,
197 .of_match = of_match_ptr(ocelot_pinctrl_of_match),
198 .probe = ocelot_pinctrl_probe,
199 .priv_auto = sizeof(struct mscc_pinctrl),
200 .ops = &mscc_pinctrl_ops,
201 };
202