1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4 *
5 * Driver for STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander
6 * based on Linux driver : pinctrl/pinctrl-stmfx.c
7 */
8
9 #define LOG_CATEGORY UCLASS_PINCTRL
10
11 #include <dm.h>
12 #include <log.h>
13 #include <i2c.h>
14 #include <asm/gpio.h>
15 #include <dm/device.h>
16 #include <dm/device-internal.h>
17 #include <dm/device_compat.h>
18 #include <dm/lists.h>
19 #include <dm/pinctrl.h>
20 #include <linux/bitfield.h>
21 #include <linux/bitops.h>
22 #include <linux/delay.h>
23 #include <power/regulator.h>
24
25 /* STMFX pins = GPIO[15:0] + aGPIO[7:0] */
26 #define STMFX_MAX_GPIO 16
27 #define STMFX_MAX_AGPIO 8
28
29 /* General */
30 #define STMFX_REG_CHIP_ID 0x00 /* R */
31 #define STMFX_REG_FW_VERSION_MSB 0x01 /* R */
32 #define STMFX_REG_FW_VERSION_LSB 0x02 /* R */
33 #define STMFX_REG_SYS_CTRL 0x40 /* RW */
34
35 /* MFX boot time is around 10ms, so after reset, we have to wait this delay */
36 #define STMFX_BOOT_TIME_MS 10
37
38 /* GPIOs expander */
39 /* GPIO_STATE1 0x10, GPIO_STATE2 0x11, GPIO_STATE3 0x12 */
40 #define STMFX_REG_GPIO_STATE 0x10 /* R */
41 /* GPIO_DIR1 0x60, GPIO_DIR2 0x61, GPIO_DIR3 0x63 */
42 #define STMFX_REG_GPIO_DIR 0x60 /* RW */
43 /* GPIO_TYPE1 0x64, GPIO_TYPE2 0x65, GPIO_TYPE3 0x66 */
44 #define STMFX_REG_GPIO_TYPE 0x64 /* RW */
45 /* GPIO_PUPD1 0x68, GPIO_PUPD2 0x69, GPIO_PUPD3 0x6A */
46 #define STMFX_REG_GPIO_PUPD 0x68 /* RW */
47 /* GPO_SET1 0x6C, GPO_SET2 0x6D, GPO_SET3 0x6E */
48 #define STMFX_REG_GPO_SET 0x6C /* RW */
49 /* GPO_CLR1 0x70, GPO_CLR2 0x71, GPO_CLR3 0x72 */
50 #define STMFX_REG_GPO_CLR 0x70 /* RW */
51
52 /* STMFX_REG_CHIP_ID bitfields */
53 #define STMFX_REG_CHIP_ID_MASK GENMASK(7, 0)
54
55 /* STMFX_REG_SYS_CTRL bitfields */
56 #define STMFX_REG_SYS_CTRL_GPIO_EN BIT(0)
57 #define STMFX_REG_SYS_CTRL_ALTGPIO_EN BIT(3)
58 #define STMFX_REG_SYS_CTRL_SWRST BIT(7)
59
60 #define NR_GPIO_REGS 3
61 #define NR_GPIOS_PER_REG 8
62 #define get_reg(offset) ((offset) / NR_GPIOS_PER_REG)
63 #define get_shift(offset) ((offset) % NR_GPIOS_PER_REG)
64 #define get_mask(offset) (BIT(get_shift(offset)))
65
66 struct stmfx_pinctrl {
67 struct udevice *gpio;
68 };
69
stmfx_read(struct udevice * dev,uint offset)70 static int stmfx_read(struct udevice *dev, uint offset)
71 {
72 return dm_i2c_reg_read(dev_get_parent(dev), offset);
73 }
74
stmfx_write(struct udevice * dev,uint offset,unsigned int val)75 static int stmfx_write(struct udevice *dev, uint offset, unsigned int val)
76 {
77 return dm_i2c_reg_write(dev_get_parent(dev), offset, val);
78 }
79
stmfx_read_reg(struct udevice * dev,u8 reg_base,uint offset)80 static int stmfx_read_reg(struct udevice *dev, u8 reg_base, uint offset)
81 {
82 u8 reg = reg_base + get_reg(offset);
83 u32 mask = get_mask(offset);
84 int ret;
85
86 ret = stmfx_read(dev, reg);
87 if (ret < 0)
88 return ret;
89
90 return ret < 0 ? ret : !!(ret & mask);
91 }
92
stmfx_write_reg(struct udevice * dev,u8 reg_base,uint offset,uint val)93 static int stmfx_write_reg(struct udevice *dev, u8 reg_base, uint offset,
94 uint val)
95 {
96 u8 reg = reg_base + get_reg(offset);
97 u32 mask = get_mask(offset);
98 int ret;
99
100 ret = stmfx_read(dev, reg);
101 if (ret < 0)
102 return ret;
103 ret = (ret & ~mask) | (val ? mask : 0);
104
105 return stmfx_write(dev, reg, ret);
106 }
107
stmfx_conf_set_pupd(struct udevice * dev,unsigned int offset,uint pupd)108 static int stmfx_conf_set_pupd(struct udevice *dev, unsigned int offset,
109 uint pupd)
110 {
111 return stmfx_write_reg(dev, STMFX_REG_GPIO_PUPD, offset, pupd);
112 }
113
stmfx_conf_get_pupd(struct udevice * dev,unsigned int offset)114 static int stmfx_conf_get_pupd(struct udevice *dev, unsigned int offset)
115 {
116 return stmfx_read_reg(dev, STMFX_REG_GPIO_PUPD, offset);
117 }
118
stmfx_conf_set_type(struct udevice * dev,unsigned int offset,uint type)119 static int stmfx_conf_set_type(struct udevice *dev, unsigned int offset,
120 uint type)
121 {
122 return stmfx_write_reg(dev, STMFX_REG_GPIO_TYPE, offset, type);
123 }
124
stmfx_conf_get_type(struct udevice * dev,unsigned int offset)125 static int stmfx_conf_get_type(struct udevice *dev, unsigned int offset)
126 {
127 return stmfx_read_reg(dev, STMFX_REG_GPIO_TYPE, offset);
128 }
129
stmfx_gpio_get(struct udevice * dev,unsigned int offset)130 static int stmfx_gpio_get(struct udevice *dev, unsigned int offset)
131 {
132 return stmfx_read_reg(dev, STMFX_REG_GPIO_STATE, offset);
133 }
134
stmfx_gpio_set(struct udevice * dev,unsigned int offset,int value)135 static int stmfx_gpio_set(struct udevice *dev, unsigned int offset, int value)
136 {
137 u32 reg = value ? STMFX_REG_GPO_SET : STMFX_REG_GPO_CLR;
138 u32 mask = get_mask(offset);
139
140 return stmfx_write(dev, reg + get_reg(offset), mask);
141 }
142
stmfx_gpio_get_function(struct udevice * dev,unsigned int offset)143 static int stmfx_gpio_get_function(struct udevice *dev, unsigned int offset)
144 {
145 int ret = stmfx_read_reg(dev, STMFX_REG_GPIO_DIR, offset);
146
147 if (ret < 0)
148 return ret;
149 /* On stmfx, gpio pins direction is (0)input, (1)output. */
150
151 return ret ? GPIOF_OUTPUT : GPIOF_INPUT;
152 }
153
stmfx_gpio_direction_input(struct udevice * dev,unsigned int offset)154 static int stmfx_gpio_direction_input(struct udevice *dev, unsigned int offset)
155 {
156 return stmfx_write_reg(dev, STMFX_REG_GPIO_DIR, offset, 0);
157 }
158
stmfx_gpio_direction_output(struct udevice * dev,unsigned int offset,int value)159 static int stmfx_gpio_direction_output(struct udevice *dev,
160 unsigned int offset, int value)
161 {
162 int ret = stmfx_gpio_set(dev, offset, value);
163 if (ret < 0)
164 return ret;
165
166 return stmfx_write_reg(dev, STMFX_REG_GPIO_DIR, offset, 1);
167 }
168
stmfx_gpio_set_flags(struct udevice * dev,unsigned int offset,ulong flags)169 static int stmfx_gpio_set_flags(struct udevice *dev, unsigned int offset,
170 ulong flags)
171 {
172 int ret = -ENOTSUPP;
173
174 if (flags & GPIOD_IS_OUT) {
175 bool value = flags & GPIOD_IS_OUT_ACTIVE;
176
177 if (flags & GPIOD_OPEN_SOURCE)
178 return -ENOTSUPP;
179 if (flags & GPIOD_OPEN_DRAIN)
180 ret = stmfx_conf_set_type(dev, offset, 0);
181 else /* PUSH-PULL */
182 ret = stmfx_conf_set_type(dev, offset, 1);
183 if (ret)
184 return ret;
185 ret = stmfx_gpio_direction_output(dev, offset, value);
186 } else if (flags & GPIOD_IS_IN) {
187 ret = stmfx_gpio_direction_input(dev, offset);
188 if (ret)
189 return ret;
190 if (flags & GPIOD_PULL_UP) {
191 ret = stmfx_conf_set_type(dev, offset, 1);
192 if (ret)
193 return ret;
194 ret = stmfx_conf_set_pupd(dev, offset, 1);
195 } else if (flags & GPIOD_PULL_DOWN) {
196 ret = stmfx_conf_set_type(dev, offset, 1);
197 if (ret)
198 return ret;
199 ret = stmfx_conf_set_pupd(dev, offset, 0);
200 }
201 }
202
203 return ret;
204 }
205
stmfx_gpio_get_flags(struct udevice * dev,unsigned int offset,ulong * flagsp)206 static int stmfx_gpio_get_flags(struct udevice *dev, unsigned int offset,
207 ulong *flagsp)
208 {
209 ulong dir_flags = 0;
210 int ret;
211
212 if (stmfx_gpio_get_function(dev, offset) == GPIOF_OUTPUT) {
213 dir_flags |= GPIOD_IS_OUT;
214 ret = stmfx_conf_get_type(dev, offset);
215 if (ret < 0)
216 return ret;
217 if (ret == 0)
218 dir_flags |= GPIOD_OPEN_DRAIN;
219 /* 1 = push-pull (default), open source not supported */
220 ret = stmfx_gpio_get(dev, offset);
221 if (ret < 0)
222 return ret;
223 if (ret)
224 dir_flags |= GPIOD_IS_OUT_ACTIVE;
225 } else {
226 dir_flags |= GPIOD_IS_IN;
227 ret = stmfx_conf_get_type(dev, offset);
228 if (ret < 0)
229 return ret;
230 if (ret == 1) {
231 ret = stmfx_conf_get_pupd(dev, offset);
232 if (ret < 0)
233 return ret;
234 if (ret == 1)
235 dir_flags |= GPIOD_PULL_UP;
236 else
237 dir_flags |= GPIOD_PULL_DOWN;
238 }
239 }
240 *flagsp = dir_flags;
241
242 return 0;
243 }
244
stmfx_gpio_probe(struct udevice * dev)245 static int stmfx_gpio_probe(struct udevice *dev)
246 {
247 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
248 struct ofnode_phandle_args args;
249 u8 sys_ctrl;
250
251 uc_priv->bank_name = "stmfx";
252 uc_priv->gpio_count = STMFX_MAX_GPIO + STMFX_MAX_AGPIO;
253 if (!dev_read_phandle_with_args(dev, "gpio-ranges",
254 NULL, 3, 0, &args)) {
255 uc_priv->gpio_count = args.args[2];
256 }
257
258 /* enable GPIO function */
259 sys_ctrl = STMFX_REG_SYS_CTRL_GPIO_EN;
260 if (uc_priv->gpio_count > STMFX_MAX_GPIO)
261 sys_ctrl |= STMFX_REG_SYS_CTRL_ALTGPIO_EN;
262 stmfx_write(dev, STMFX_REG_SYS_CTRL, sys_ctrl);
263
264 return 0;
265 }
266
267 static const struct dm_gpio_ops stmfx_gpio_ops = {
268 .set_value = stmfx_gpio_set,
269 .get_value = stmfx_gpio_get,
270 .get_function = stmfx_gpio_get_function,
271 .direction_input = stmfx_gpio_direction_input,
272 .direction_output = stmfx_gpio_direction_output,
273 .set_flags = stmfx_gpio_set_flags,
274 .get_flags = stmfx_gpio_get_flags,
275 };
276
277 U_BOOT_DRIVER(stmfx_gpio) = {
278 .name = "stmfx-gpio",
279 .id = UCLASS_GPIO,
280 .probe = stmfx_gpio_probe,
281 .ops = &stmfx_gpio_ops,
282 };
283
284 #if CONFIG_IS_ENABLED(PINCONF)
285 static const struct pinconf_param stmfx_pinctrl_conf_params[] = {
286 { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 },
287 { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 0 },
288 { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 0 },
289 { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 0 },
290 { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 },
291 { "drive-push-pull", PIN_CONFIG_DRIVE_PUSH_PULL, 0 },
292 { "output-high", PIN_CONFIG_OUTPUT, 1 },
293 { "output-low", PIN_CONFIG_OUTPUT, 0 },
294 };
295
stmfx_pinctrl_conf_set(struct udevice * dev,unsigned int pin,unsigned int param,unsigned int arg)296 static int stmfx_pinctrl_conf_set(struct udevice *dev, unsigned int pin,
297 unsigned int param, unsigned int arg)
298 {
299 int ret, dir;
300 struct stmfx_pinctrl *plat = dev_get_plat(dev);
301
302 dir = stmfx_gpio_get_function(plat->gpio, pin);
303
304 if (dir < 0)
305 return dir;
306
307 switch (param) {
308 case PIN_CONFIG_BIAS_PULL_PIN_DEFAULT:
309 case PIN_CONFIG_BIAS_DISABLE:
310 case PIN_CONFIG_DRIVE_PUSH_PULL:
311 ret = stmfx_conf_set_type(dev, pin, 0);
312 break;
313 case PIN_CONFIG_BIAS_PULL_DOWN:
314 ret = stmfx_conf_set_type(dev, pin, 1);
315 if (ret)
316 return ret;
317 ret = stmfx_conf_set_pupd(dev, pin, 0);
318 break;
319 case PIN_CONFIG_BIAS_PULL_UP:
320 ret = stmfx_conf_set_type(dev, pin, 1);
321 if (ret)
322 return ret;
323 ret = stmfx_conf_set_pupd(dev, pin, 1);
324 break;
325 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
326 ret = stmfx_conf_set_type(dev, pin, 1);
327 break;
328 case PIN_CONFIG_OUTPUT:
329 ret = stmfx_gpio_direction_output(plat->gpio, pin, arg);
330 break;
331 default:
332 return -ENOTSUPP;
333 }
334
335 return ret;
336 }
337 #endif
338
stmfx_pinctrl_get_pins_count(struct udevice * dev)339 static int stmfx_pinctrl_get_pins_count(struct udevice *dev)
340 {
341 struct stmfx_pinctrl *plat = dev_get_plat(dev);
342 struct gpio_dev_priv *uc_priv;
343
344 uc_priv = dev_get_uclass_priv(plat->gpio);
345
346 return uc_priv->gpio_count;
347 }
348
349 /*
350 * STMFX pins[15:0] are called "gpio[15:0]"
351 * and STMFX pins[23:16] are called "agpio[7:0]"
352 */
353 static char pin_name[PINNAME_SIZE];
stmfx_pinctrl_get_pin_name(struct udevice * dev,unsigned int selector)354 static const char *stmfx_pinctrl_get_pin_name(struct udevice *dev,
355 unsigned int selector)
356 {
357 if (selector < STMFX_MAX_GPIO)
358 snprintf(pin_name, PINNAME_SIZE, "gpio%u", selector);
359 else
360 snprintf(pin_name, PINNAME_SIZE, "agpio%u", selector - 16);
361 return pin_name;
362 }
363
stmfx_pinctrl_get_pin_conf(struct udevice * dev,unsigned int pin,int func)364 static const char *stmfx_pinctrl_get_pin_conf(struct udevice *dev,
365 unsigned int pin, int func)
366 {
367 int pupd, type;
368
369 type = stmfx_conf_get_type(dev, pin);
370 if (type < 0)
371 return "";
372
373 if (func == GPIOF_OUTPUT) {
374 if (type)
375 return "drive-open-drain";
376 else
377 return ""; /* default: push-pull*/
378 }
379 if (!type)
380 return ""; /* default: bias-disable*/
381
382 pupd = stmfx_conf_get_pupd(dev, pin);
383 if (pupd < 0)
384 return "";
385
386 if (pupd)
387 return "bias-pull-up";
388 else
389 return "bias-pull-down";
390 }
391
stmfx_pinctrl_get_pin_muxing(struct udevice * dev,unsigned int selector,char * buf,int size)392 static int stmfx_pinctrl_get_pin_muxing(struct udevice *dev,
393 unsigned int selector,
394 char *buf, int size)
395 {
396 struct stmfx_pinctrl *plat = dev_get_plat(dev);
397 int func;
398
399 func = stmfx_gpio_get_function(plat->gpio, selector);
400 if (func < 0)
401 return func;
402
403 snprintf(buf, size, "%s ", func == GPIOF_INPUT ? "input" : "output");
404
405 strncat(buf, stmfx_pinctrl_get_pin_conf(dev, selector, func), size);
406
407 return 0;
408 }
409
stmfx_pinctrl_bind(struct udevice * dev)410 static int stmfx_pinctrl_bind(struct udevice *dev)
411 {
412 struct stmfx_pinctrl *plat = dev_get_plat(dev);
413
414 /* subnode name is not explicit: use father name */
415 device_set_name(dev, dev->parent->name);
416
417 return device_bind_driver_to_node(dev->parent,
418 "stmfx-gpio", dev->parent->name,
419 dev_ofnode(dev), &plat->gpio);
420 };
421
stmfx_pinctrl_probe(struct udevice * dev)422 static int stmfx_pinctrl_probe(struct udevice *dev)
423 {
424 struct stmfx_pinctrl *plat = dev_get_plat(dev);
425
426 return device_probe(plat->gpio);
427 };
428
429 const struct pinctrl_ops stmfx_pinctrl_ops = {
430 .get_pins_count = stmfx_pinctrl_get_pins_count,
431 .get_pin_name = stmfx_pinctrl_get_pin_name,
432 .set_state = pinctrl_generic_set_state,
433 .get_pin_muxing = stmfx_pinctrl_get_pin_muxing,
434 #if CONFIG_IS_ENABLED(PINCONF)
435 .pinconf_set = stmfx_pinctrl_conf_set,
436 .pinconf_num_params = ARRAY_SIZE(stmfx_pinctrl_conf_params),
437 .pinconf_params = stmfx_pinctrl_conf_params,
438 #endif
439 };
440
441 static const struct udevice_id stmfx_pinctrl_match[] = {
442 { .compatible = "st,stmfx-0300-pinctrl", },
443 };
444
445 U_BOOT_DRIVER(stmfx_pinctrl) = {
446 .name = "stmfx-pinctrl",
447 .id = UCLASS_PINCTRL,
448 .of_match = of_match_ptr(stmfx_pinctrl_match),
449 .bind = stmfx_pinctrl_bind,
450 .probe = stmfx_pinctrl_probe,
451 .ops = &stmfx_pinctrl_ops,
452 .plat_auto = sizeof(struct stmfx_pinctrl),
453 };
454
stmfx_chip_init(struct udevice * dev)455 static int stmfx_chip_init(struct udevice *dev)
456 {
457 u8 id;
458 u8 version[2];
459 int ret;
460 struct dm_i2c_chip *chip = dev_get_parent_plat(dev);
461
462 ret = dm_i2c_reg_read(dev, STMFX_REG_CHIP_ID);
463 if (ret < 0) {
464 dev_err(dev, "error reading chip id: %d\n", ret);
465 return ret;
466 }
467 id = (u8)ret;
468 /*
469 * Check that ID is the complement of the I2C address:
470 * STMFX I2C address follows the 7-bit format (MSB), that's why
471 * client->addr is shifted.
472 *
473 * STMFX_I2C_ADDR| STMFX | Linux
474 * input pin | I2C device address | I2C device address
475 *---------------------------------------------------------
476 * 0 | b: 1000 010x h:0x84 | 0x42
477 * 1 | b: 1000 011x h:0x86 | 0x43
478 */
479 if (FIELD_GET(STMFX_REG_CHIP_ID_MASK, ~id) != (chip->chip_addr << 1)) {
480 dev_err(dev, "unknown chip id: %#x\n", id);
481 return -EINVAL;
482 }
483
484 ret = dm_i2c_read(dev, STMFX_REG_FW_VERSION_MSB,
485 version, sizeof(version));
486 if (ret) {
487 dev_err(dev, "error reading fw version: %d\n", ret);
488 return ret;
489 }
490
491 dev_info(dev, "STMFX id: %#x, fw version: %x.%02x\n",
492 id, version[0], version[1]);
493
494 ret = dm_i2c_reg_read(dev, STMFX_REG_SYS_CTRL);
495
496 if (ret < 0)
497 return ret;
498
499 ret = dm_i2c_reg_write(dev, STMFX_REG_SYS_CTRL,
500 ret | STMFX_REG_SYS_CTRL_SWRST);
501 if (ret)
502 return ret;
503
504 mdelay(STMFX_BOOT_TIME_MS);
505
506 return ret;
507 }
508
stmfx_probe(struct udevice * dev)509 static int stmfx_probe(struct udevice *dev)
510 {
511 struct udevice *vdd;
512 int ret;
513
514 ret = device_get_supply_regulator(dev, "vdd-supply", &vdd);
515 if (ret && ret != -ENOENT) {
516 dev_err(dev, "vdd regulator error:%d\n", ret);
517 return ret;
518 }
519 if (!ret) {
520 ret = regulator_set_enable(vdd, true);
521 if (ret) {
522 dev_err(dev, "vdd enable failed: %d\n", ret);
523 return ret;
524 }
525 }
526
527 return stmfx_chip_init(dev);
528 }
529
530 static const struct udevice_id stmfx_match[] = {
531 { .compatible = "st,stmfx-0300", },
532 };
533
534 U_BOOT_DRIVER(stmfx) = {
535 .name = "stmfx",
536 .id = UCLASS_I2C_GENERIC,
537 .of_match = of_match_ptr(stmfx_match),
538 .probe = stmfx_probe,
539 .bind = dm_scan_fdt_dev,
540 };
541