1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Pinctrl / GPIO driver for StarFive SoC 4 * 5 * Copyright (C) 2022 Shanghai StarFive Technology Co., Ltd. 6 * Author: Lee Kuan Lim <kuanlim.lee@starfivetech.com> 7 * Author: Jianlong Huang <jianlong.huang@starfivetech.com> 8 */ 9 10 #define STARFIVE_PINCTRL(a, b) { .number = a, .name = b } 11 12 extern const struct pinctrl_ops starfive_pinctrl_ops; 13 14 struct starfive_pinctrl_pin { 15 unsigned int number; 16 const char *name; 17 }; 18 19 struct starfive_pinctrl_soc_info { 20 /* pinctrl */ 21 int (*set_one_pinmux)(struct udevice *dev, unsigned int pin, 22 unsigned int din, u32 dout, u32 doen, u32 func); 23 int (*get_padcfg_base)(struct udevice *dev, 24 unsigned int pin); 25 26 /* gpio dout/doen/din/gpioinput register */ 27 unsigned int dout_reg_base; 28 unsigned int dout_mask; 29 unsigned int doen_reg_base; 30 unsigned int doen_mask; 31 unsigned int gpi_reg_base; 32 unsigned int gpi_mask; 33 unsigned int gpioin_reg_base; 34 35 /* gpio */ 36 const char *gpio_bank_name; 37 int ngpios; 38 void (*gpio_init_hw)(struct udevice *dev); 39 }; 40 41 /* 42 * struct starfive_pinctrl_priv - private data for Starfive pinctrl driver 43 * 44 * @padctl_base: base address of the pinctrl device 45 * @info: SoC specific data & function 46 */ 47 struct starfive_pinctrl_priv { 48 void __iomem *base; 49 struct starfive_pinctrl_soc_info *info; 50 }; 51 52 void starfive_set_gpiomux(struct udevice *dev, unsigned int pin, 53 unsigned int din, u32 dout, u32 doen); 54 int starfive_pinctrl_probe(struct udevice *dev, 55 const struct starfive_pinctrl_soc_info *info); 56