1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2008 - 2015 Michal Simek <monstr@monstr.eu>
4 * Clean driver and add xilinx constant from header file
5 *
6 * (C) Copyright 2004 Atmark Techno, Inc.
7 * Yasushi SHOJI <yashi@atmark-techno.com>
8 */
9
10 #include <config.h>
11 #include <dm.h>
12 #include <asm/io.h>
13 #include <linux/bitops.h>
14 #include <linux/compiler.h>
15 #include <serial.h>
16
17 #define SR_TX_FIFO_FULL BIT(3) /* transmit FIFO full */
18 #define SR_TX_FIFO_EMPTY BIT(2) /* transmit FIFO empty */
19 #define SR_RX_FIFO_VALID_DATA BIT(0) /* data in receive FIFO */
20 #define SR_RX_FIFO_FULL BIT(1) /* receive FIFO full */
21
22 #define ULITE_CONTROL_RST_TX 0x01
23 #define ULITE_CONTROL_RST_RX 0x02
24
25 static bool little_endian __section(".data");
26
27 struct uartlite {
28 unsigned int rx_fifo;
29 unsigned int tx_fifo;
30 unsigned int status;
31 unsigned int control;
32 };
33
34 struct uartlite_plat {
35 struct uartlite *regs;
36 };
37
uart_in32(void __iomem * addr)38 static u32 uart_in32(void __iomem *addr)
39 {
40 if (little_endian)
41 return in_le32(addr);
42 else
43 return in_be32(addr);
44 }
45
uart_out32(void __iomem * addr,u32 val)46 static void uart_out32(void __iomem *addr, u32 val)
47 {
48 if (little_endian)
49 out_le32(addr, val);
50 else
51 out_be32(addr, val);
52 }
53
uartlite_serial_putc(struct udevice * dev,const char ch)54 static int uartlite_serial_putc(struct udevice *dev, const char ch)
55 {
56 struct uartlite_plat *plat = dev_get_plat(dev);
57 struct uartlite *regs = plat->regs;
58
59 if (uart_in32(®s->status) & SR_TX_FIFO_FULL)
60 return -EAGAIN;
61
62 uart_out32(®s->tx_fifo, ch & 0xff);
63
64 return 0;
65 }
66
uartlite_serial_getc(struct udevice * dev)67 static int uartlite_serial_getc(struct udevice *dev)
68 {
69 struct uartlite_plat *plat = dev_get_plat(dev);
70 struct uartlite *regs = plat->regs;
71
72 if (!(uart_in32(®s->status) & SR_RX_FIFO_VALID_DATA))
73 return -EAGAIN;
74
75 return uart_in32(®s->rx_fifo) & 0xff;
76 }
77
uartlite_serial_pending(struct udevice * dev,bool input)78 static int uartlite_serial_pending(struct udevice *dev, bool input)
79 {
80 struct uartlite_plat *plat = dev_get_plat(dev);
81 struct uartlite *regs = plat->regs;
82
83 if (input)
84 return uart_in32(®s->status) & SR_RX_FIFO_VALID_DATA;
85
86 return !(uart_in32(®s->status) & SR_TX_FIFO_EMPTY);
87 }
88
uartlite_serial_probe(struct udevice * dev)89 static int uartlite_serial_probe(struct udevice *dev)
90 {
91 struct uartlite_plat *plat = dev_get_plat(dev);
92 struct uartlite *regs = plat->regs;
93 int ret;
94
95 uart_out32(®s->control, 0);
96 uart_out32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
97 ret = uart_in32(®s->status);
98 /* Endianness detection */
99 if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
100 little_endian = true;
101 uart_out32(®s->control, ULITE_CONTROL_RST_RX |
102 ULITE_CONTROL_RST_TX);
103 }
104
105 return 0;
106 }
107
uartlite_serial_of_to_plat(struct udevice * dev)108 static int uartlite_serial_of_to_plat(struct udevice *dev)
109 {
110 struct uartlite_plat *plat = dev_get_plat(dev);
111
112 plat->regs = dev_read_addr_ptr(dev);
113
114 return 0;
115 }
116
117 static const struct dm_serial_ops uartlite_serial_ops = {
118 .putc = uartlite_serial_putc,
119 .pending = uartlite_serial_pending,
120 .getc = uartlite_serial_getc,
121 };
122
123 static const struct udevice_id uartlite_serial_ids[] = {
124 { .compatible = "xlnx,opb-uartlite-1.00.b", },
125 { .compatible = "xlnx,xps-uartlite-1.00.a" },
126 { }
127 };
128
129 U_BOOT_DRIVER(serial_uartlite) = {
130 .name = "serial_uartlite",
131 .id = UCLASS_SERIAL,
132 .of_match = uartlite_serial_ids,
133 .of_to_plat = uartlite_serial_of_to_plat,
134 .plat_auto = sizeof(struct uartlite_plat),
135 .probe = uartlite_serial_probe,
136 .ops = &uartlite_serial_ops,
137 };
138
139 #ifdef CONFIG_DEBUG_UART_UARTLITE
140
141 #include <debug_uart.h>
142
_debug_uart_init(void)143 static inline void _debug_uart_init(void)
144 {
145 struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE);
146 int ret;
147
148 uart_out32(®s->control, 0);
149 uart_out32(®s->control, ULITE_CONTROL_RST_RX | ULITE_CONTROL_RST_TX);
150 ret = uart_in32(®s->status);
151 /* Endianness detection */
152 if ((ret & SR_TX_FIFO_EMPTY) != SR_TX_FIFO_EMPTY) {
153 little_endian = true;
154 uart_out32(®s->control, ULITE_CONTROL_RST_RX |
155 ULITE_CONTROL_RST_TX);
156 }
157 }
158
_debug_uart_putc(int ch)159 static inline void _debug_uart_putc(int ch)
160 {
161 struct uartlite *regs = (struct uartlite *)CONFIG_VAL(DEBUG_UART_BASE);
162
163 while (uart_in32(®s->status) & SR_TX_FIFO_FULL)
164 ;
165
166 uart_out32(®s->tx_fifo, ch & 0xff);
167 }
168
169 DEBUG_UART_FUNCS
170 #endif
171