1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2014 Google, Inc
4  */
5 
6 #define LOG_CATEGORY UCLASS_SPI
7 
8 #include <dm.h>
9 #include <errno.h>
10 #include <log.h>
11 #include <malloc.h>
12 #include <spi.h>
13 #include <spi-mem.h>
14 #include <dm/device_compat.h>
15 #include <asm/global_data.h>
16 #include <dm/device-internal.h>
17 #include <dm/uclass-internal.h>
18 #include <dm/lists.h>
19 #include <dm/util.h>
20 
21 DECLARE_GLOBAL_DATA_PTR;
22 
23 #define SPI_DEFAULT_SPEED_HZ 100000
24 
spi_set_speed_mode(struct udevice * bus,int speed,int mode)25 static int spi_set_speed_mode(struct udevice *bus, int speed, int mode)
26 {
27 	struct dm_spi_ops *ops;
28 	int ret;
29 
30 	ops = spi_get_ops(bus);
31 	if (ops->set_speed)
32 		ret = ops->set_speed(bus, speed);
33 	else
34 		ret = -EINVAL;
35 	if (ret) {
36 		dev_err(bus, "Cannot set speed (err=%d)\n", ret);
37 		return ret;
38 	}
39 
40 	if (ops->set_mode)
41 		ret = ops->set_mode(bus, mode);
42 	else
43 		ret = -EINVAL;
44 	if (ret) {
45 		dev_err(bus, "Cannot set mode (err=%d)\n", ret);
46 		return ret;
47 	}
48 
49 	return 0;
50 }
51 
dm_spi_claim_bus(struct udevice * dev)52 int dm_spi_claim_bus(struct udevice *dev)
53 {
54 	struct udevice *bus = dev->parent;
55 	struct dm_spi_ops *ops = spi_get_ops(bus);
56 	struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
57 	struct spi_slave *slave = dev_get_parent_priv(dev);
58 	uint speed, mode;
59 
60 	speed = slave->max_hz;
61 	mode = slave->mode;
62 
63 	if (spi->max_hz) {
64 		if (speed)
65 			speed = min(speed, spi->max_hz);
66 		else
67 			speed = spi->max_hz;
68 	}
69 	if (!speed)
70 		speed = SPI_DEFAULT_SPEED_HZ;
71 
72 	if (speed != spi->speed || mode != spi->mode) {
73 		int ret = spi_set_speed_mode(bus, speed, slave->mode);
74 
75 		if (ret)
76 			return log_ret(ret);
77 
78 		spi->speed = speed;
79 		spi->mode = mode;
80 	}
81 
82 	return log_ret(ops->claim_bus ? ops->claim_bus(dev) : 0);
83 }
84 
dm_spi_release_bus(struct udevice * dev)85 void dm_spi_release_bus(struct udevice *dev)
86 {
87 	struct udevice *bus = dev->parent;
88 	struct dm_spi_ops *ops = spi_get_ops(bus);
89 
90 	if (ops->release_bus)
91 		ops->release_bus(dev);
92 }
93 
dm_spi_xfer(struct udevice * dev,unsigned int bitlen,const void * dout,void * din,unsigned long flags)94 int dm_spi_xfer(struct udevice *dev, unsigned int bitlen,
95 		const void *dout, void *din, unsigned long flags)
96 {
97 	struct udevice *bus = dev->parent;
98 	struct dm_spi_ops *ops = spi_get_ops(bus);
99 
100 	if (bus->uclass->uc_drv->id != UCLASS_SPI)
101 		return -EOPNOTSUPP;
102 	if (!ops->xfer)
103 		return -ENOSYS;
104 
105 	return ops->xfer(dev, bitlen, dout, din, flags);
106 }
107 
dm_spi_get_mmap(struct udevice * dev,ulong * map_basep,uint * map_sizep,uint * offsetp)108 int dm_spi_get_mmap(struct udevice *dev, ulong *map_basep, uint *map_sizep,
109 		    uint *offsetp)
110 {
111 	struct udevice *bus = dev->parent;
112 	struct dm_spi_ops *ops = spi_get_ops(bus);
113 
114 	if (bus->uclass->uc_drv->id != UCLASS_SPI)
115 		return -EOPNOTSUPP;
116 	if (!ops->get_mmap)
117 		return -ENOSYS;
118 
119 	return ops->get_mmap(dev, map_basep, map_sizep, offsetp);
120 }
121 
spi_claim_bus(struct spi_slave * slave)122 int spi_claim_bus(struct spi_slave *slave)
123 {
124 	return log_ret(dm_spi_claim_bus(slave->dev));
125 }
126 
spi_release_bus(struct spi_slave * slave)127 void spi_release_bus(struct spi_slave *slave)
128 {
129 	dm_spi_release_bus(slave->dev);
130 }
131 
spi_set_speed(struct spi_slave * slave,uint hz)132 int spi_set_speed(struct spi_slave *slave, uint hz)
133 {
134 	struct dm_spi_ops *ops;
135 	int ret;
136 
137 	ops = spi_get_ops(slave->dev->parent);
138 	if (ops->set_speed)
139 		ret = ops->set_speed(slave->dev->parent, hz);
140 	else
141 		ret = -EINVAL;
142 	if (ret)
143 		dev_err(slave->dev, "Cannot set speed (err=%d)\n", ret);
144 	return ret;
145 }
146 
spi_xfer(struct spi_slave * slave,unsigned int bitlen,const void * dout,void * din,unsigned long flags)147 int spi_xfer(struct spi_slave *slave, unsigned int bitlen,
148 	     const void *dout, void *din, unsigned long flags)
149 {
150 	return dm_spi_xfer(slave->dev, bitlen, dout, din, flags);
151 }
152 
spi_write_then_read(struct spi_slave * slave,const u8 * opcode,size_t n_opcode,const u8 * txbuf,u8 * rxbuf,size_t n_buf)153 int spi_write_then_read(struct spi_slave *slave, const u8 *opcode,
154 			size_t n_opcode, const u8 *txbuf, u8 *rxbuf,
155 			size_t n_buf)
156 {
157 	unsigned long flags = SPI_XFER_BEGIN;
158 	int ret;
159 
160 	if (n_buf == 0)
161 		flags |= SPI_XFER_END;
162 
163 	ret = spi_xfer(slave, n_opcode * 8, opcode, NULL, flags);
164 	if (ret) {
165 		dev_dbg(slave->dev,
166 			"spi: failed to send command (%zu bytes): %d\n",
167 			n_opcode, ret);
168 	} else if (n_buf != 0) {
169 		ret = spi_xfer(slave, n_buf * 8, txbuf, rxbuf, SPI_XFER_END);
170 		if (ret)
171 			dev_dbg(slave->dev,
172 				"spi: failed to transfer %zu bytes of data: %d\n",
173 				n_buf, ret);
174 	}
175 
176 	return ret;
177 }
178 
179 #if CONFIG_IS_ENABLED(OF_REAL)
spi_child_post_bind(struct udevice * dev)180 static int spi_child_post_bind(struct udevice *dev)
181 {
182 	struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
183 
184 	if (!dev_has_ofnode(dev))
185 		return 0;
186 
187 	return spi_slave_of_to_plat(dev, plat);
188 }
189 #endif
190 
spi_post_probe(struct udevice * bus)191 static int spi_post_probe(struct udevice *bus)
192 {
193 	if (CONFIG_IS_ENABLED(OF_REAL)) {
194 		struct dm_spi_bus *spi = dev_get_uclass_priv(bus);
195 
196 		spi->max_hz = dev_read_u32_default(bus, "spi-max-frequency", 0);
197 	}
198 
199 	return 0;
200 }
201 
spi_child_pre_probe(struct udevice * dev)202 static int spi_child_pre_probe(struct udevice *dev)
203 {
204 	struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
205 	struct spi_slave *slave = dev_get_parent_priv(dev);
206 
207 	/*
208 	 * This is needed because we pass struct spi_slave around the place
209 	 * instead slave->dev (a struct udevice). So we have to have some
210 	 * way to access the slave udevice given struct spi_slave. Once we
211 	 * change the SPI API to use udevice instead of spi_slave, we can
212 	 * drop this.
213 	 */
214 	slave->dev = dev;
215 
216 	slave->max_hz = plat->max_hz;
217 	slave->mode = plat->mode;
218 	slave->wordlen = SPI_DEFAULT_WORDLEN;
219 
220 	return 0;
221 }
222 
spi_chip_select(struct udevice * dev)223 int spi_chip_select(struct udevice *dev)
224 {
225 	struct dm_spi_slave_plat *plat = dev_get_parent_plat(dev);
226 
227 	return plat ? plat->cs[0] : -ENOENT;
228 }
229 
spi_find_chip_select(struct udevice * bus,int cs,struct udevice ** devp)230 int spi_find_chip_select(struct udevice *bus, int cs, struct udevice **devp)
231 {
232 	struct dm_spi_ops *ops;
233 	struct spi_cs_info info;
234 	struct udevice *dev;
235 	int ret;
236 
237 	/*
238 	 * Ask the driver. For the moment we don't have CS info.
239 	 * When we do we could provide the driver with a helper function
240 	 * to figure out what chip selects are valid, or just handle the
241 	 * request.
242 	 */
243 	ops = spi_get_ops(bus);
244 	if (ops->cs_info) {
245 		ret = ops->cs_info(bus, cs, &info);
246 	} else {
247 		/*
248 		 * We could assume there is at least one valid chip select.
249 		 * The driver didn't care enough to tell us.
250 		 */
251 		ret = 0;
252 	}
253 
254 	if (ret) {
255 		dev_err(bus, "Invalid cs %d (err=%d)\n", cs, ret);
256 		return ret;
257 	}
258 
259 	for (device_find_first_child(bus, &dev); dev;
260 	     device_find_next_child(&dev)) {
261 		struct dm_spi_slave_plat *plat;
262 
263 		plat = dev_get_parent_plat(dev);
264 		dev_dbg(bus, "%s: plat=%p, cs=%d\n", __func__, plat, plat->cs[0]);
265 		if (plat->cs[0] == cs) {
266 			*devp = dev;
267 			return 0;
268 		}
269 	}
270 
271 	return -ENODEV;
272 }
273 
spi_cs_is_valid(unsigned int busnum,unsigned int cs)274 int spi_cs_is_valid(unsigned int busnum, unsigned int cs)
275 {
276 	struct spi_cs_info info;
277 	struct udevice *bus;
278 	int ret;
279 
280 	ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus);
281 	if (ret) {
282 		log_debug("%s: No bus %d\n", __func__, busnum);
283 		return ret;
284 	}
285 
286 	return spi_cs_info(bus, cs, &info);
287 }
288 
spi_cs_info(struct udevice * bus,uint cs,struct spi_cs_info * info)289 int spi_cs_info(struct udevice *bus, uint cs, struct spi_cs_info *info)
290 {
291 	struct spi_cs_info local_info;
292 	int ret;
293 
294 	if (!info)
295 		info = &local_info;
296 
297 	/* If there is a device attached, return it */
298 	info->dev = NULL;
299 	ret = spi_find_chip_select(bus, cs, &info->dev);
300 	return ret == -ENODEV ? 0 : ret;
301 }
302 
spi_find_bus_and_cs(int busnum,int cs,struct udevice ** busp,struct udevice ** devp)303 int spi_find_bus_and_cs(int busnum, int cs, struct udevice **busp,
304 			struct udevice **devp)
305 {
306 	struct udevice *bus, *dev;
307 	int ret;
308 
309 	ret = uclass_find_device_by_seq(UCLASS_SPI, busnum, &bus);
310 	if (ret) {
311 		log_debug("%s: No bus %d\n", __func__, busnum);
312 		return ret;
313 	}
314 	ret = spi_find_chip_select(bus, cs, &dev);
315 	if (ret) {
316 		dev_dbg(bus, "%s: No cs %d\n", __func__, cs);
317 		return ret;
318 	}
319 	*busp = bus;
320 	*devp = dev;
321 
322 	return ret;
323 }
324 
spi_get_bus_and_cs(int busnum,int cs,struct udevice ** busp,struct spi_slave ** devp)325 int spi_get_bus_and_cs(int busnum, int cs, struct udevice **busp,
326 		       struct spi_slave **devp)
327 {
328 	struct udevice *bus, *dev;
329 	struct dm_spi_bus *bus_data;
330 	struct spi_slave *slave;
331 	int ret;
332 
333 #if CONFIG_IS_ENABLED(OF_PLATDATA)
334 	ret = uclass_first_device_err(UCLASS_SPI, &bus);
335 #else
336 	ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus);
337 #endif
338 	if (ret) {
339 		log_err("Invalid bus %d (err=%d)\n", busnum, ret);
340 		return ret;
341 	}
342 	ret = spi_find_chip_select(bus, cs, &dev);
343 	if (ret) {
344 		dev_err(bus, "Invalid chip select %d:%d (err=%d)\n", busnum, cs, ret);
345 		return ret;
346 	}
347 
348 	if (!device_active(dev)) {
349 		struct spi_slave *slave;
350 
351 		ret = device_probe(dev);
352 		if (ret)
353 			goto err;
354 		slave = dev_get_parent_priv(dev);
355 		slave->dev = dev;
356 	}
357 
358 	slave = dev_get_parent_priv(dev);
359 	bus_data = dev_get_uclass_priv(bus);
360 
361 	/*
362 	 * In case the operation speed is not yet established by
363 	 * dm_spi_claim_bus() ensure the bus is configured properly.
364 	 */
365 	if (!bus_data->speed) {
366 		ret = spi_claim_bus(slave);
367 		if (ret)
368 			goto err;
369 	}
370 	*busp = bus;
371 	*devp = slave;
372 
373 	return 0;
374 
375 err:
376 	log_debug("%s: Error path, device '%s'\n", __func__, dev->name);
377 
378 	return ret;
379 }
380 
_spi_get_bus_and_cs(int busnum,int cs,int speed,int mode,const char * drv_name,const char * dev_name,struct udevice ** busp,struct spi_slave ** devp)381 int _spi_get_bus_and_cs(int busnum, int cs, int speed, int mode,
382 			const char *drv_name, const char *dev_name,
383 			struct udevice **busp, struct spi_slave **devp)
384 {
385 	struct udevice *bus, *dev;
386 	struct dm_spi_slave_plat *plat;
387 	struct dm_spi_bus *bus_data;
388 	struct spi_slave *slave;
389 	bool created = false;
390 	int ret;
391 
392 #if CONFIG_IS_ENABLED(OF_PLATDATA)
393 	ret = uclass_first_device_err(UCLASS_SPI, &bus);
394 #else
395 	ret = uclass_get_device_by_seq(UCLASS_SPI, busnum, &bus);
396 #endif
397 	if (ret) {
398 		log_err("Invalid bus %d (err=%d)\n", busnum, ret);
399 		return ret;
400 	}
401 	ret = spi_find_chip_select(bus, cs, &dev);
402 
403 	/*
404 	 * If there is no such device, create one automatically. This means
405 	 * that we don't need a device tree node or platform data for the
406 	 * SPI flash chip - we will bind to the correct driver.
407 	 */
408 	if (ret == -ENODEV && drv_name) {
409 		dev_dbg(bus, "%s: Binding new device '%s', busnum=%d, cs=%d, driver=%s\n",
410 			__func__, dev_name, busnum, cs, drv_name);
411 		ret = device_bind_driver(bus, drv_name, dev_name, &dev);
412 		if (ret) {
413 			dev_dbg(bus, "%s: Unable to bind driver (ret=%d)\n",
414 				__func__, ret);
415 			return ret;
416 		}
417 		plat = dev_get_parent_plat(dev);
418 		plat->cs[0] = cs;
419 		if (speed) {
420 			plat->max_hz = speed;
421 		} else {
422 			dev_warn(bus,
423 				 "Warning: SPI speed fallback to %u kHz\n",
424 				 SPI_DEFAULT_SPEED_HZ / 1000);
425 			plat->max_hz = SPI_DEFAULT_SPEED_HZ;
426 		}
427 		plat->mode = mode;
428 		created = true;
429 	} else if (ret) {
430 		dev_err(bus, "Invalid chip select %d:%d (err=%d)\n", busnum, cs, ret);
431 		return ret;
432 	} else if (dev) {
433 		plat = dev_get_parent_plat(dev);
434 	}
435 
436 	if (!device_active(dev)) {
437 		struct spi_slave *slave;
438 
439 		ret = device_probe(dev);
440 		if (ret)
441 			goto err;
442 		slave = dev_get_parent_priv(dev);
443 		slave->dev = dev;
444 	}
445 
446 	slave = dev_get_parent_priv(dev);
447 	bus_data = dev_get_uclass_priv(bus);
448 
449 #if CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)
450 	if ((dev_read_bool(dev, "parallel-memories")) && !slave->multi_cs_cap) {
451 		dev_err(dev, "controller doesn't support multi CS\n");
452 		return -EINVAL;
453 	}
454 #endif
455 	/*
456 	 * In case the operation speed is not yet established by
457 	 * dm_spi_claim_bus() ensure the bus is configured properly.
458 	 */
459 	if (!bus_data->speed) {
460 		ret = spi_claim_bus(slave);
461 		if (ret)
462 			goto err;
463 	}
464 
465 	/* In case bus frequency or mode changed, update it. */
466 	if ((speed && bus_data->speed && bus_data->speed != speed) ||
467 	    (plat && plat->mode != mode)) {
468 		ret = spi_set_speed_mode(bus, speed, mode);
469 		if (ret)
470 			goto err_speed_mode;
471 	}
472 
473 	*busp = bus;
474 	*devp = slave;
475 	log_debug("%s: bus=%p, slave=%p\n", __func__, bus, *devp);
476 
477 	return 0;
478 
479 err_speed_mode:
480 	spi_release_bus(slave);
481 err:
482 	log_debug("%s: Error path, created=%d, device '%s'\n", __func__,
483 		  created, dev->name);
484 	if (created) {
485 		device_remove(dev, DM_REMOVE_NORMAL);
486 		device_unbind(dev);
487 	}
488 
489 	return ret;
490 }
491 
492 /* Compatibility function - to be removed */
spi_setup_slave(unsigned int busnum,unsigned int cs,unsigned int speed,unsigned int mode)493 struct spi_slave *spi_setup_slave(unsigned int busnum, unsigned int cs,
494 				  unsigned int speed, unsigned int mode)
495 {
496 	struct spi_slave *slave;
497 	struct udevice *dev;
498 	int ret;
499 
500 	ret = _spi_get_bus_and_cs(busnum, cs, speed, mode, NULL, 0, &dev,
501 				  &slave);
502 	if (ret)
503 		return NULL;
504 
505 	return slave;
506 }
507 
spi_free_slave(struct spi_slave * slave)508 void spi_free_slave(struct spi_slave *slave)
509 {
510 	device_remove(slave->dev, DM_REMOVE_NORMAL);
511 }
512 
spi_slave_of_to_plat(struct udevice * dev,struct dm_spi_slave_plat * plat)513 int spi_slave_of_to_plat(struct udevice *dev, struct dm_spi_slave_plat *plat)
514 {
515 	int mode = 0;
516 	int value;
517 
518 #if CONFIG_IS_ENABLED(SPI_STACKED_PARALLEL)
519 	int ret;
520 
521 	ret = dev_read_u32_array(dev, "reg", plat->cs, SPI_CS_CNT_MAX);
522 
523 	if (ret == -EOVERFLOW || ret == -FDT_ERR_BADLAYOUT) {
524 		dev_read_u32(dev, "reg", &plat->cs[0]);
525 	} else {
526 		dev_err(dev, "has no valid 'reg' property (%d)\n", ret);
527 		return ret;
528 	}
529 #else
530 	plat->cs[0] = dev_read_u32_default(dev, "reg", -1);
531 #endif
532 
533 	plat->max_hz = dev_read_u32_default(dev, "spi-max-frequency",
534 					    SPI_DEFAULT_SPEED_HZ);
535 	if (dev_read_bool(dev, "spi-cpol"))
536 		mode |= SPI_CPOL;
537 	if (dev_read_bool(dev, "spi-cpha"))
538 		mode |= SPI_CPHA;
539 	if (dev_read_bool(dev, "spi-cs-high"))
540 		mode |= SPI_CS_HIGH;
541 	if (dev_read_bool(dev, "spi-3wire"))
542 		mode |= SPI_3WIRE;
543 	if (dev_read_bool(dev, "spi-half-duplex"))
544 		mode |= SPI_PREAMBLE;
545 
546 	/* Device DUAL/QUAD mode */
547 	value = dev_read_u32_default(dev, "spi-tx-bus-width", 1);
548 	switch (value) {
549 	case 1:
550 		break;
551 	case 2:
552 		mode |= SPI_TX_DUAL;
553 		break;
554 	case 4:
555 		mode |= SPI_TX_QUAD;
556 		break;
557 	case 8:
558 		mode |= SPI_TX_OCTAL;
559 		break;
560 	default:
561 		warn_non_xpl("spi-tx-bus-width %d not supported\n", value);
562 		break;
563 	}
564 
565 	value = dev_read_u32_default(dev, "spi-rx-bus-width", 1);
566 	switch (value) {
567 	case 1:
568 		break;
569 	case 2:
570 		mode |= SPI_RX_DUAL;
571 		break;
572 	case 4:
573 		mode |= SPI_RX_QUAD;
574 		break;
575 	case 8:
576 		mode |= SPI_RX_OCTAL;
577 		break;
578 	default:
579 		warn_non_xpl("spi-rx-bus-width %d not supported\n", value);
580 		break;
581 	}
582 
583 	plat->mode = mode;
584 
585 	return 0;
586 }
587 
588 UCLASS_DRIVER(spi) = {
589 	.id		= UCLASS_SPI,
590 	.name		= "spi",
591 	.flags		= DM_UC_FLAG_SEQ_ALIAS,
592 #if CONFIG_IS_ENABLED(OF_REAL)
593 	.post_bind	= dm_scan_fdt_dev,
594 #endif
595 	.post_probe	= spi_post_probe,
596 	.child_pre_probe = spi_child_pre_probe,
597 	.per_device_auto	= sizeof(struct dm_spi_bus),
598 	.per_child_auto	= sizeof(struct spi_slave),
599 	.per_child_plat_auto	= sizeof(struct dm_spi_slave_plat),
600 #if CONFIG_IS_ENABLED(OF_REAL)
601 	.child_post_bind = spi_child_post_bind,
602 #endif
603 };
604 
605 UCLASS_DRIVER(spi_generic) = {
606 	.id		= UCLASS_SPI_GENERIC,
607 	.name		= "spi_generic",
608 };
609 
610 U_BOOT_DRIVER(spi_generic_drv) = {
611 	.name		= "spi_generic_drv",
612 	.id		= UCLASS_SPI_GENERIC,
613 };
614