1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2018, Bin Meng <bmeng.cn@gmail.com>
4 *
5 * Generic reset driver for x86 processor
6 */
7
8 #include <dm.h>
9 #include <efi_loader.h>
10 #include <pch.h>
11 #include <sysreset.h>
12 #include <acpi/acpi_s3.h>
13 #include <asm/io.h>
14 #include <asm/processor.h>
15 #include <asm/sysreset.h>
16
17 /*
18 * Power down the machine by using the power management sleep control
19 * of the chipset. This will currently only work on Intel chipsets.
20 * However, adapting it to new chipsets is fairly simple. You will
21 * have to find the IO address of the power management register block
22 * in your southbridge, and look up the appropriate SLP_TYP_S5 value
23 * from your southbridge's data sheet.
24 *
25 * This function never returns.
26 */
pch_sysreset_power_off(struct udevice * dev)27 int pch_sysreset_power_off(struct udevice *dev)
28 {
29 struct x86_sysreset_plat *plat = dev_get_plat(dev);
30 struct pch_pmbase_info pm;
31 u32 reg32;
32 int ret;
33
34 if (!plat->pch)
35 return -ENOENT;
36 ret = pch_ioctl(plat->pch, PCH_REQ_PMBASE_INFO, &pm, sizeof(pm));
37 if (ret)
38 return ret;
39
40 /*
41 * Mask interrupts or system might stay in a coma, not executing code
42 * anymore, but not powered off either.
43 */
44 asm("cli");
45
46 /*
47 * Avoid any GPI waking the system from S5* or the system might stay in
48 * a coma
49 */
50 outl(0x00000000, pm.base + pm.gpio0_en_ofs);
51
52 /* Clear Power Button Status */
53 outw(PWRBTN_STS, pm.base + pm.pm1_sts_ofs);
54
55 /* PMBASE + 4, Bit 10-12, Sleeping Type, * set to 111 -> S5, soft_off */
56 reg32 = inl(pm.base + pm.pm1_cnt_ofs);
57
58 /* Set Sleeping Type to S5 (poweroff) */
59 reg32 &= ~(SLP_EN | SLP_TYP);
60 reg32 |= SLP_TYP_S5;
61 outl(reg32, pm.base + pm.pm1_cnt_ofs);
62
63 /* Now set the Sleep Enable bit */
64 reg32 |= SLP_EN;
65 outl(reg32, pm.base + pm.pm1_cnt_ofs);
66
67 for (;;)
68 asm("hlt");
69 }
70
x86_sysreset_request(struct udevice * dev,enum sysreset_t type)71 static int x86_sysreset_request(struct udevice *dev, enum sysreset_t type)
72 {
73 int value;
74 int ret;
75
76 switch (type) {
77 case SYSRESET_WARM:
78 value = SYS_RST | RST_CPU;
79 break;
80 case SYSRESET_COLD:
81 value = SYS_RST | RST_CPU | FULL_RST;
82 break;
83 case SYSRESET_POWER_OFF:
84 ret = pch_sysreset_power_off(dev);
85 if (ret)
86 return ret;
87 return -EINPROGRESS;
88 default:
89 return -EPROTONOSUPPORT;
90 }
91
92 outb(value, IO_PORT_RESET);
93
94 return -EINPROGRESS;
95 }
96
x86_sysreset_get_last(struct udevice * dev)97 static int x86_sysreset_get_last(struct udevice *dev)
98 {
99 return SYSRESET_POWER;
100 }
101
102 #ifdef CONFIG_EFI_LOADER
efi_reset_system(enum efi_reset_type reset_type,efi_status_t reset_status,unsigned long data_size,void * reset_data)103 void __efi_runtime EFIAPI efi_reset_system(
104 enum efi_reset_type reset_type,
105 efi_status_t reset_status,
106 unsigned long data_size, void *reset_data)
107 {
108 int value;
109
110 /*
111 * inline this code since we are not caused in the context of a
112 * udevice and passing NULL to x86_sysreset_request() is too horrible.
113 */
114 if (reset_type == EFI_RESET_COLD ||
115 reset_type == EFI_RESET_PLATFORM_SPECIFIC)
116 value = SYS_RST | RST_CPU | FULL_RST;
117 else /* assume EFI_RESET_WARM since we cannot return an error */
118 value = SYS_RST | RST_CPU;
119 outb(value, IO_PORT_RESET);
120
121 /* TODO EFI_RESET_SHUTDOWN */
122
123 while (1) { }
124 }
125 #endif
126
x86_sysreset_probe(struct udevice * dev)127 static int x86_sysreset_probe(struct udevice *dev)
128 {
129 struct x86_sysreset_plat *plat = dev_get_plat(dev);
130
131 /*
132 * Locate the PCH if there is one. It isn't essential. Avoid this before
133 * relocation as we shouldn't need reset then and it needs a lot of
134 * memory for PCI enumeration.
135 */
136 if (gd->flags & GD_FLG_RELOC)
137 uclass_first_device(UCLASS_PCH, &plat->pch);
138
139 return 0;
140 }
141
142 static const struct udevice_id x86_sysreset_ids[] = {
143 { .compatible = "x86,reset" },
144 { }
145 };
146
147 static struct sysreset_ops x86_sysreset_ops = {
148 .request = x86_sysreset_request,
149 .get_last = x86_sysreset_get_last,
150 };
151
152 U_BOOT_DRIVER(x86_reset) = {
153 .name = "x86_reset",
154 .id = UCLASS_SYSRESET,
155 .of_match = x86_sysreset_ids,
156 .ops = &x86_sysreset_ops,
157 .probe = x86_sysreset_probe,
158 .plat_auto = sizeof(struct x86_sysreset_plat),
159 };
160