1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2015 Thomas Chou <thomas@wytron.com.tw>
4 */
5
6 #include <dm.h>
7 #include <errno.h>
8 #include <timer.h>
9 #include <os.h>
10
11 #define SANDBOX_TIMER_RATE 1000000
12
13 /* system timer offset in ms */
14 static unsigned long sandbox_timer_offset;
15
timer_test_add_offset(unsigned long offset)16 void timer_test_add_offset(unsigned long offset)
17 {
18 sandbox_timer_offset += offset;
19 }
20
timer_test_get_offset(void)21 ulong timer_test_get_offset(void)
22 {
23 return sandbox_timer_offset;
24 };
25
timer_early_get_count(void)26 u64 notrace timer_early_get_count(void)
27 {
28 return os_get_nsec() / 1000 + sandbox_timer_offset * 1000;
29 }
30
timer_early_get_rate(void)31 unsigned long notrace timer_early_get_rate(void)
32 {
33 return SANDBOX_TIMER_RATE;
34 }
35
sandbox_timer_get_count(struct udevice * dev)36 static notrace u64 sandbox_timer_get_count(struct udevice *dev)
37 {
38 return timer_early_get_count();
39 }
40
sandbox_timer_probe(struct udevice * dev)41 static int sandbox_timer_probe(struct udevice *dev)
42 {
43 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
44
45 if (CONFIG_IS_ENABLED(CPU) &&
46 dev_read_bool(dev, "sandbox,timebase-frequency-fallback"))
47 return timer_timebase_fallback(dev);
48 else if (!uc_priv->clock_rate)
49 uc_priv->clock_rate = SANDBOX_TIMER_RATE;
50
51 return 0;
52 }
53
54 static const struct timer_ops sandbox_timer_ops = {
55 .get_count = sandbox_timer_get_count,
56 };
57
58 static const struct udevice_id sandbox_timer_ids[] = {
59 { .compatible = "sandbox,timer" },
60 { }
61 };
62
63 U_BOOT_DRIVER(sandbox_timer) = {
64 .name = "sandbox_timer",
65 .id = UCLASS_TIMER,
66 .of_match = sandbox_timer_ids,
67 .probe = sandbox_timer_probe,
68 .ops = &sandbox_timer_ops,
69 .flags = DM_FLAG_PRE_RELOC,
70 };
71
72 /* This is here in case we don't have a device tree */
73 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
74 U_BOOT_DRVINFO(sandbox_timer_non_fdt) = {
75 .name = "sandbox_timer",
76 };
77 #endif
78