1 /* 2 * URB OHCI HCD (Host Controller Driver) for USB. 3 * 4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at> 5 * (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net> 6 * 7 * usb-ohci.h 8 */ 9 10 /* 11 * e.g. PCI controllers need this 12 */ 13 14 #include <asm/cache.h> 15 #include <asm/io.h> 16 17 #ifdef CONFIG_SYS_OHCI_SWAP_REG_ACCESS 18 # define ohci_readl(a) __swap_32(in_be32((u32 *)a)) 19 # define ohci_writel(a, b) out_be32((u32 *)b, __swap_32(a)) 20 #else 21 # define ohci_readl(a) readl(a) 22 # define ohci_writel(v, a) writel(v, a) 23 #endif /* CONFIG_SYS_OHCI_SWAP_REG_ACCESS */ 24 25 #if ARCH_DMA_MINALIGN > 16 26 #define ED_ALIGNMENT ARCH_DMA_MINALIGN 27 #else 28 #define ED_ALIGNMENT 16 29 #endif 30 31 #if CONFIG_IS_ENABLED(DM_USB) && ARCH_DMA_MINALIGN > 32 32 #define TD_ALIGNMENT ARCH_DMA_MINALIGN 33 #else 34 #define TD_ALIGNMENT 32 35 #endif 36 37 /* functions for doing board or CPU specific setup/cleanup */ 38 int usb_board_stop(void); 39 40 int usb_cpu_init(void); 41 int usb_cpu_stop(void); 42 int usb_cpu_init_fail(void); 43 44 /* ED States */ 45 #define ED_NEW 0x00 46 #define ED_UNLINK 0x01 47 #define ED_OPER 0x02 48 #define ED_DEL 0x04 49 #define ED_URB_DEL 0x08 50 51 /* usb_ohci_ed */ 52 struct ed { 53 __u32 hwINFO; 54 __u32 hwTailP; 55 __u32 hwHeadP; 56 __u32 hwNextED; 57 58 struct ed *ed_prev; 59 __u8 int_period; 60 __u8 int_branch; 61 __u8 int_load; 62 __u8 int_interval; 63 __u8 state; 64 __u8 type; 65 __u16 last_iso; 66 struct ed *ed_rm_list; 67 68 struct usb_device *usb_dev; 69 void *purb; 70 __u32 unused[2]; 71 } __attribute__((aligned(ED_ALIGNMENT))); 72 typedef struct ed ed_t; 73 74 /* TD info field */ 75 #define TD_CC 0xf0000000 76 #define TD_CC_GET(td_p) ((td_p >>28) & 0x0f) 77 #define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28) 78 #define TD_EC 0x0C000000 79 #define TD_T 0x03000000 80 #define TD_T_DATA0 0x02000000 81 #define TD_T_DATA1 0x03000000 82 #define TD_T_TOGGLE 0x00000000 83 #define TD_R 0x00040000 84 #define TD_DI 0x00E00000 85 #define TD_DI_SET(X) (((X) & 0x07)<< 21) 86 #define TD_DP 0x00180000 87 #define TD_DP_SETUP 0x00000000 88 #define TD_DP_IN 0x00100000 89 #define TD_DP_OUT 0x00080000 90 91 #define TD_ISO 0x00010000 92 #define TD_DEL 0x00020000 93 94 /* CC Codes */ 95 #define TD_CC_NOERROR 0x00 96 #define TD_CC_CRC 0x01 97 #define TD_CC_BITSTUFFING 0x02 98 #define TD_CC_DATATOGGLEM 0x03 99 #define TD_CC_STALL 0x04 100 #define TD_DEVNOTRESP 0x05 101 #define TD_PIDCHECKFAIL 0x06 102 #define TD_UNEXPECTEDPID 0x07 103 #define TD_DATAOVERRUN 0x08 104 #define TD_DATAUNDERRUN 0x09 105 #define TD_BUFFEROVERRUN 0x0C 106 #define TD_BUFFERUNDERRUN 0x0D 107 #define TD_NOTACCESSED 0x0F 108 109 #define MAXPSW 1 110 111 struct td { 112 __u32 hwINFO; 113 __u32 hwCBP; /* Current Buffer Pointer */ 114 __u32 hwNextTD; /* Next TD Pointer */ 115 __u32 hwBE; /* Memory Buffer End Pointer */ 116 117 __u16 hwPSW[MAXPSW]; 118 __u8 unused; 119 __u8 index; 120 struct ed *ed; 121 struct td *next_dl_td; 122 struct usb_device *usb_dev; 123 int transfer_len; 124 __u32 data; 125 126 __u32 unused2[2]; 127 } __attribute__((aligned(TD_ALIGNMENT))); 128 typedef struct td td_t; 129 130 #define OHCI_ED_SKIP (1 << 14) 131 132 /* 133 * The HCCA (Host Controller Communications Area) is a 256 byte 134 * structure defined in the OHCI spec. that the host controller is 135 * told the base address of. It must be 256-byte aligned. 136 */ 137 138 #define NUM_INTS 32 /* part of the OHCI standard */ 139 struct ohci_hcca { 140 __u32 int_table[NUM_INTS]; /* Interrupt ED table */ 141 __u16 frame_no; /* current frame number */ 142 __u16 pad1; /* set to 0 on each frame_no change */ 143 __u32 done_head; /* info returned for an interrupt */ 144 u8 reserved_for_hc[116]; 145 } __attribute__((aligned(256))); 146 147 /* 148 * This is the structure of the OHCI controller's memory mapped I/O 149 * region. This is Memory Mapped I/O. You must use the ohci_readl() and 150 * ohci_writel() macros defined in this file to access these!! 151 */ 152 struct ohci_regs { 153 /* control and status registers */ 154 __u32 revision; 155 __u32 control; 156 __u32 cmdstatus; 157 __u32 intrstatus; 158 __u32 intrenable; 159 __u32 intrdisable; 160 /* memory pointers */ 161 __u32 hcca; 162 __u32 ed_periodcurrent; 163 __u32 ed_controlhead; 164 __u32 ed_controlcurrent; 165 __u32 ed_bulkhead; 166 __u32 ed_bulkcurrent; 167 __u32 donehead; 168 /* frame counters */ 169 __u32 fminterval; 170 __u32 fmremaining; 171 __u32 fmnumber; 172 __u32 periodicstart; 173 __u32 lsthresh; 174 /* Root hub ports */ 175 struct ohci_roothub_regs { 176 __u32 a; 177 __u32 b; 178 __u32 status; 179 __u32 portstatus[]; 180 } roothub; 181 } __attribute__((aligned(32))); 182 183 /* Some EHCI controls */ 184 #define EHCI_USBCMD_OFF 0x20 185 #define EHCI_USBCMD_HCRESET (1 << 1) 186 187 /* OHCI CONTROL AND STATUS REGISTER MASKS */ 188 189 /* 190 * HcControl (control) register masks 191 */ 192 #define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */ 193 #define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */ 194 #define OHCI_CTRL_IE (1 << 3) /* isochronous enable */ 195 #define OHCI_CTRL_CLE (1 << 4) /* control list enable */ 196 #define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */ 197 #define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */ 198 #define OHCI_CTRL_IR (1 << 8) /* interrupt routing */ 199 #define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */ 200 #define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */ 201 202 /* pre-shifted values for HCFS */ 203 # define OHCI_USB_RESET (0 << 6) 204 # define OHCI_USB_RESUME (1 << 6) 205 # define OHCI_USB_OPER (2 << 6) 206 # define OHCI_USB_SUSPEND (3 << 6) 207 208 /* 209 * HcCommandStatus (cmdstatus) register masks 210 */ 211 #define OHCI_HCR (1 << 0) /* host controller reset */ 212 #define OHCI_CLF (1 << 1) /* control list filled */ 213 #define OHCI_BLF (1 << 2) /* bulk list filled */ 214 #define OHCI_OCR (1 << 3) /* ownership change request */ 215 #define OHCI_SOC (3 << 16) /* scheduling overrun count */ 216 217 /* 218 * masks used with interrupt registers: 219 * HcInterruptStatus (intrstatus) 220 * HcInterruptEnable (intrenable) 221 * HcInterruptDisable (intrdisable) 222 */ 223 #define OHCI_INTR_SO (1 << 0) /* scheduling overrun */ 224 #define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */ 225 #define OHCI_INTR_SF (1 << 2) /* start frame */ 226 #define OHCI_INTR_RD (1 << 3) /* resume detect */ 227 #define OHCI_INTR_UE (1 << 4) /* unrecoverable error */ 228 #define OHCI_INTR_FNO (1 << 5) /* frame number overflow */ 229 #define OHCI_INTR_RHSC (1 << 6) /* root hub status change */ 230 #define OHCI_INTR_OC (1 << 30) /* ownership change */ 231 #define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */ 232 233 /* Virtual Root HUB */ 234 struct virt_root_hub { 235 int devnum; /* Address of Root Hub endpoint */ 236 void *dev; /* was urb */ 237 void *int_addr; 238 int send; 239 int interval; 240 }; 241 242 /* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */ 243 244 /* destination of request */ 245 #define RH_INTERFACE 0x01 246 #define RH_ENDPOINT 0x02 247 #define RH_OTHER 0x03 248 249 #define RH_CLASS 0x20 250 #define RH_VENDOR 0x40 251 252 /* Requests: bRequest << 8 | bmRequestType */ 253 #define RH_GET_STATUS 0x0080 254 #define RH_CLEAR_FEATURE 0x0100 255 #define RH_SET_FEATURE 0x0300 256 #define RH_SET_ADDRESS 0x0500 257 #define RH_GET_DESCRIPTOR 0x0680 258 #define RH_SET_DESCRIPTOR 0x0700 259 #define RH_GET_CONFIGURATION 0x0880 260 #define RH_SET_CONFIGURATION 0x0900 261 #define RH_GET_STATE 0x0280 262 #define RH_GET_INTERFACE 0x0A80 263 #define RH_SET_INTERFACE 0x0B00 264 #define RH_SYNC_FRAME 0x0C80 265 /* Our Vendor Specific Request */ 266 #define RH_SET_EP 0x2000 267 268 /* Hub port features */ 269 #define RH_PORT_CONNECTION 0x00 270 #define RH_PORT_ENABLE 0x01 271 #define RH_PORT_SUSPEND 0x02 272 #define RH_PORT_OVER_CURRENT 0x03 273 #define RH_PORT_RESET 0x04 274 #define RH_PORT_POWER 0x08 275 #define RH_PORT_LOW_SPEED 0x09 276 277 #define RH_C_PORT_CONNECTION 0x10 278 #define RH_C_PORT_ENABLE 0x11 279 #define RH_C_PORT_SUSPEND 0x12 280 #define RH_C_PORT_OVER_CURRENT 0x13 281 #define RH_C_PORT_RESET 0x14 282 283 /* Hub features */ 284 #define RH_C_HUB_LOCAL_POWER 0x00 285 #define RH_C_HUB_OVER_CURRENT 0x01 286 287 #define RH_DEVICE_REMOTE_WAKEUP 0x00 288 #define RH_ENDPOINT_STALL 0x01 289 290 #define RH_ACK 0x01 291 #define RH_REQ_ERR -1 292 #define RH_NACK 0x00 293 294 /* OHCI ROOT HUB REGISTER MASKS */ 295 296 /* roothub.portstatus [i] bits */ 297 #define RH_PS_CCS 0x00000001 /* current connect status */ 298 #define RH_PS_PES 0x00000002 /* port enable status*/ 299 #define RH_PS_PSS 0x00000004 /* port suspend status */ 300 #define RH_PS_POCI 0x00000008 /* port over current indicator */ 301 #define RH_PS_PRS 0x00000010 /* port reset status */ 302 #define RH_PS_PPS 0x00000100 /* port power status */ 303 #define RH_PS_LSDA 0x00000200 /* low speed device attached */ 304 #define RH_PS_CSC 0x00010000 /* connect status change */ 305 #define RH_PS_PESC 0x00020000 /* port enable status change */ 306 #define RH_PS_PSSC 0x00040000 /* port suspend status change */ 307 #define RH_PS_OCIC 0x00080000 /* over current indicator change */ 308 #define RH_PS_PRSC 0x00100000 /* port reset status change */ 309 310 /* roothub.status bits */ 311 #define RH_HS_LPS 0x00000001 /* local power status */ 312 #define RH_HS_OCI 0x00000002 /* over current indicator */ 313 #define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */ 314 #define RH_HS_LPSC 0x00010000 /* local power status change */ 315 #define RH_HS_OCIC 0x00020000 /* over current indicator change */ 316 #define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */ 317 318 /* roothub.b masks */ 319 #define RH_B_DR 0x0000ffff /* device removable flags */ 320 #define RH_B_PPCM 0xffff0000 /* port power control mask */ 321 322 /* roothub.a masks */ 323 #define RH_A_NDP (0xff << 0) /* number of downstream ports */ 324 #define RH_A_PSM (1 << 8) /* power switching mode */ 325 #define RH_A_NPS (1 << 9) /* no power switching */ 326 #define RH_A_DT (1 << 10) /* device type (mbz) */ 327 #define RH_A_OCPM (1 << 11) /* over current protection mode */ 328 #define RH_A_NOCP (1 << 12) /* no over current protection */ 329 #define RH_A_POTPGT (0xff << 24) /* power on to power good time */ 330 331 /* urb */ 332 #define N_URB_TD 48 333 typedef struct 334 { 335 ed_t *ed; 336 __u16 length; /* number of tds associated with this request */ 337 __u16 td_cnt; /* number of tds already serviced */ 338 struct usb_device *dev; 339 int state; 340 unsigned long pipe; 341 void *transfer_buffer; 342 int transfer_buffer_length; 343 int interval; 344 int actual_length; 345 int finished; 346 td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */ 347 } urb_priv_t; 348 #define URB_DEL 1 349 350 #define NUM_EDS 32 /* num of preallocated endpoint descriptors */ 351 352 #define NUM_TD 64 /* we need more TDs than EDs */ 353 354 #define NUM_INT_DEVS 8 /* num of ohci_dev structs for int endpoints */ 355 356 typedef struct ohci_device { 357 ed_t ed[NUM_EDS] __aligned(ED_ALIGNMENT); 358 td_t tds[NUM_TD] __aligned(TD_ALIGNMENT); 359 int ed_cnt; 360 int devnum; 361 } ohci_dev_t; 362 363 /* 364 * This is the full ohci controller description 365 * 366 * Note how the "proper" USB information is just 367 * a subset of what the full implementation needs. (Linus) 368 */ 369 370 typedef struct ohci { 371 /* this allocates EDs for all possible endpoints */ 372 struct ohci_device ohci_dev __aligned(TD_ALIGNMENT); 373 struct ohci_device int_dev[NUM_INT_DEVS] __aligned(TD_ALIGNMENT); 374 struct ohci_hcca *hcca; /* hcca */ 375 /*dma_addr_t hcca_dma;*/ 376 377 int irq; 378 int disabled; /* e.g. got a UE, we're hung */ 379 int sleeping; 380 unsigned long flags; /* for HC bugs */ 381 382 struct ohci_regs *regs; /* OHCI controller's memory */ 383 384 int ohci_int_load[32]; /* load of the 32 Interrupt Chains (for load balancing)*/ 385 ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */ 386 ed_t *ed_bulktail; /* last endpoint of bulk list */ 387 ed_t *ed_controltail; /* last endpoint of control list */ 388 int intrstatus; 389 __u32 hc_control; /* copy of the hc control reg */ 390 struct usb_device *dev[32]; 391 struct virt_root_hub rh; 392 393 const char *slot_name; 394 } ohci_t; 395 396 #if CONFIG_IS_ENABLED(DM_USB) 397 extern struct dm_usb_ops ohci_usb_ops; 398 399 int ohci_register(struct udevice *dev, struct ohci_regs *regs); 400 int ohci_deregister(struct udevice *dev); 401 #endif 402