1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2007-2008 4 * Stelian Pop <stelian@popies.net> 5 * Lead Tech Design <www.leadtechdesign.com> 6 * 7 * Configuation settings for the AT91SAM9RLEK board. 8 */ 9 10 #ifndef __CONFIG_H 11 #define __CONFIG_H 12 13 #include <asm/hardware.h> 14 15 /* ARM asynchronous clock */ 16 #define CFG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ 17 #define CFG_SYS_AT91_MAIN_CLOCK 12000000 /* main clock xtal */ 18 19 /* SDRAM */ 20 #define CFG_SYS_SDRAM_BASE ATMEL_BASE_CS1 21 #define CFG_SYS_SDRAM_SIZE 0x04000000 22 23 #define CFG_SYS_INIT_RAM_SIZE (16 * 1024) 24 #define CFG_SYS_INIT_RAM_ADDR ATMEL_BASE_SRAM 25 26 /* NAND flash */ 27 #ifdef CONFIG_CMD_NAND 28 #define CFG_SYS_NAND_BASE ATMEL_BASE_CS3 29 /* our ALE is AD21 */ 30 #define CFG_SYS_NAND_MASK_ALE (1 << 21) 31 /* our CLE is AD22 */ 32 #define CFG_SYS_NAND_MASK_CLE (1 << 22) 33 #define CFG_SYS_NAND_ENABLE_PIN AT91_PIN_PB6 34 #define CFG_SYS_NAND_READY_PIN AT91_PIN_PD17 35 36 #endif 37 38 #endif 39