1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2019 NXP
4  */
5 
6 #ifndef __IMX8MM_EVK_H
7 #define __IMX8MM_EVK_H
8 
9 #include <linux/sizes.h>
10 #include <linux/stringify.h>
11 #include <asm/arch/imx-regs.h>
12 
13 #define UBOOT_ITB_OFFSET			0x57C00
14 #define FSPI_CONF_BLOCK_SIZE		0x1000
15 #define UBOOT_ITB_OFFSET_FSPI  \
16 	(UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
17 #ifdef CONFIG_FSPI_CONF_HEADER
18 #define CFG_SYS_UBOOT_BASE  \
19 	(QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
20 #else
21 #define CFG_SYS_UBOOT_BASE	\
22 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
23 #endif
24 
25 #ifdef CONFIG_XPL_BUILD
26 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
27 #define CFG_MALLOC_F_ADDR		0x930000
28 /* For RAW image gives a error info not panic */
29 
30 #endif
31 
32 /* Link Definitions */
33 
34 #define CFG_SYS_INIT_RAM_ADDR        0x40000000
35 #define CFG_SYS_INIT_RAM_SIZE        0x200000
36 
37 #define CFG_SYS_SDRAM_BASE           0x40000000
38 #define PHYS_SDRAM                      0x40000000
39 #define PHYS_SDRAM_SIZE			0x80000000 /* 2GB DDR */
40 
41 #define CFG_FEC_MXC_PHYADDR          0
42 
43 #endif
44