1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2016 Freescale Semiconductor, Inc. 4 * Copyright 2021 NXP 5 */ 6 7 #ifndef __LS1012AQDS_H__ 8 #define __LS1012AQDS_H__ 9 10 #include "ls1012a_common.h" 11 12 /* DDR */ 13 #define CFG_SYS_SDRAM_SIZE 0x40000000 14 15 /* 16 * QIXIS Definitions 17 */ 18 19 #ifdef CONFIG_FSL_QIXIS 20 #define CFG_SYS_I2C_FPGA_ADDR 0x66 21 #define QIXIS_LBMAP_BRDCFG_REG 0x04 22 #define QIXIS_LBMAP_SWITCH 6 23 #define QIXIS_LBMAP_MASK 0x08 24 #define QIXIS_LBMAP_SHIFT 0 25 #define QIXIS_LBMAP_DFLTBANK 0x00 26 #define QIXIS_LBMAP_ALTBANK 0x08 27 #define QIXIS_RST_CTL_RESET 0x31 28 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 29 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 30 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 31 #endif 32 33 /* 34 * I2C bus multiplexer 35 */ 36 #define I2C_MUX_PCA_ADDR_PRI 0x77 37 #define I2C_MUX_PCA_ADDR_SEC 0x76 /* Secondary multiplexer */ 38 #define I2C_RETIMER_ADDR 0x18 39 #define I2C_MUX_CH_DEFAULT 0x8 40 #define I2C_MUX_CH_CH7301 0xC 41 #define I2C_MUX_CH5 0xD 42 #define I2C_MUX_CH7 0xF 43 44 #define I2C_MUX_CH_VOL_MONITOR 0xa 45 46 /* 47 * RTC configuration 48 */ 49 #define CFG_SYS_I2C_RTC_ADDR 0x51 /* Channel 3*/ 50 51 /* Voltage monitor on channel 2*/ 52 #define I2C_VOL_MONITOR_ADDR 0x40 53 #define I2C_VOL_MONITOR_BUS_V_OFFSET 0x2 54 #define I2C_VOL_MONITOR_BUS_V_OVF 0x1 55 #define I2C_VOL_MONITOR_BUS_V_SHIFT 3 56 57 #undef CFG_EXTRA_ENV_SETTINGS 58 #define CFG_EXTRA_ENV_SETTINGS \ 59 "verify=no\0" \ 60 "kernel_addr=0x01000000\0" \ 61 "kernelheader_addr=0x600000\0" \ 62 "scriptaddr=0x80000000\0" \ 63 "scripthdraddr=0x80080000\0" \ 64 "fdtheader_addr_r=0x80100000\0" \ 65 "kernelheader_addr_r=0x80200000\0" \ 66 "kernel_addr_r=0x96000000\0" \ 67 "fdt_addr_r=0x90000000\0" \ 68 "load_addr=0xa0000000\0" \ 69 "kernel_size=0x2800000\0" \ 70 "kernelheader_size=0x40000\0" \ 71 "console=ttyS0,115200\0" \ 72 BOOTENV \ 73 "boot_scripts=ls1012aqds_boot.scr\0" \ 74 "boot_script_hdr=hdr_ls1012aqds_bs.out\0" \ 75 "scan_dev_for_boot_part=" \ 76 "part list ${devtype} ${devnum} devplist; " \ 77 "env exists devplist || setenv devplist 1; " \ 78 "for distro_bootpart in ${devplist}; do " \ 79 "if fstype ${devtype} " \ 80 "${devnum}:${distro_bootpart} " \ 81 "bootfstype; then " \ 82 "run scan_dev_for_boot; " \ 83 "fi; " \ 84 "done\0" \ 85 "boot_a_script=" \ 86 "load ${devtype} ${devnum}:${distro_bootpart} " \ 87 "${scriptaddr} ${prefix}${script}; " \ 88 "env exists secureboot && load ${devtype} " \ 89 "${devnum}:${distro_bootpart} " \ 90 "${scripthdraddr} ${prefix}${boot_script_hdr}; " \ 91 "env exists secureboot " \ 92 "&& esbc_validate ${scripthdraddr};" \ 93 "source ${scriptaddr}\0" \ 94 "qspi_bootcmd=echo Trying load from qspi..;" \ 95 "sf probe 0:0 && sf read $load_addr " \ 96 "$kernel_addr $kernel_size; env exists secureboot " \ 97 "&& sf read $kernelheader_addr_r $kernelheader_addr " \ 98 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; " \ 99 "bootm $load_addr#$board\0" 100 101 #ifdef CONFIG_TFABOOT 102 #undef QSPI_NOR_BOOTCOMMAND 103 #define QSPI_NOR_BOOTCOMMAND "run distro_bootcmd; run qspi_bootcmd; "\ 104 "env exists secureboot && esbc_halt;" 105 #endif 106 107 #include <asm/fsl_secure_boot.h> 108 #endif /* __LS1012AQDS_H__ */ 109