1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2019, 2021 NXP 4 */ 5 6 #ifndef __LS1028A_RDB_H 7 #define __LS1028A_RDB_H 8 9 #include "ls1028a_common.h" 10 11 #define COUNTER_FREQUENCY_REAL (get_board_sys_clk() / 4) 12 13 /* Store environment at top of flash */ 14 15 /* 16 * QIXIS Definitions 17 */ 18 19 #ifdef CONFIG_FSL_QIXIS 20 #define QIXIS_BASE 0x7fb00000 21 #define QIXIS_BASE_PHYS QIXIS_BASE 22 #define CFG_SYS_I2C_FPGA_ADDR 0x66 23 #define QIXIS_LBMAP_SWITCH 2 24 #define QIXIS_LBMAP_MASK 0xe0 25 #define QIXIS_LBMAP_SHIFT 0x5 26 #define QIXIS_LBMAP_DFLTBANK 0x00 27 #define QIXIS_LBMAP_ALTBANK 0x00 28 #define QIXIS_LBMAP_SD 0x00 29 #define QIXIS_LBMAP_EMMC 0x00 30 #define QIXIS_LBMAP_XSPI 0x00 31 #define QIXIS_RCW_SRC_SD 0xf8 32 #define QIXIS_RCW_SRC_EMMC 0xf9 33 #define QIXIS_RCW_SRC_XSPI 0xff 34 #define QIXIS_RST_CTL_RESET 0x31 35 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x10 36 #define QIXIS_RCFG_CTL_RECONFIG_START 0x11 37 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 38 #define QIXIS_RST_FORCE_MEM 0x01 39 40 #define CFG_SYS_FPGA_CSPR_EXT (0x0) 41 #define CFG_SYS_FPGA_CSPR (CSPR_PHYS_ADDR(QIXIS_BASE_PHYS) | \ 42 CSPR_PORT_SIZE_8 | \ 43 CSPR_MSEL_GPCM | \ 44 CSPR_V) 45 #define CFG_SYS_FPGA_CSOR (CSOR_NOR_ADM_SHIFT(4) | \ 46 CSOR_NOR_NOR_MODE_AVD_NOR | \ 47 CSOR_NOR_TRHZ_80) 48 #endif 49 50 /* Initial environment variables */ 51 #ifndef SPL_NO_ENV 52 #undef CFG_EXTRA_ENV_SETTINGS 53 #define CFG_EXTRA_ENV_SETTINGS \ 54 "board=ls1028ardb\0" \ 55 "hwconfig=fsl_ddr:bank_intlv=auto\0" \ 56 "fdtfile=fsl-ls1028a-rdb.dtb\0" \ 57 "ramdisk_addr=0x800000\0" \ 58 "ramdisk_size=0x2000000\0" \ 59 "bootm_size=0x10000000\0" \ 60 "kernel_addr=0x01000000\0" \ 61 "scriptaddr=0x80000000\0" \ 62 "scripthdraddr=0x80080000\0" \ 63 "fdtheader_addr_r=0x80100000\0" \ 64 "kernelheader_addr_r=0x80200000\0" \ 65 "load_addr=0xa0000000\0" \ 66 "kernel_addr_r=0x81000000\0" \ 67 "fdt_addr_r=0x90000000\0" \ 68 "ramdisk_addr_r=0xa0000000\0" \ 69 "kernel_start=0x1000000\0" \ 70 "kernelheader_start=0x600000\0" \ 71 "kernel_load=0xa0000000\0" \ 72 "kernel_size=0x2800000\0" \ 73 "kernelheader_size=0x40000\0" \ 74 "kernel_addr_sd=0x8000\0" \ 75 "kernel_size_sd=0x14000\0" \ 76 "kernelhdr_addr_sd=0x3000\0" \ 77 "kernelhdr_size_sd=0x20\0" \ 78 "console=ttyS0,115200\0" \ 79 BOOTENV \ 80 "boot_scripts=ls1028ardb_boot.scr\0" \ 81 "boot_script_hdr=hdr_ls1028ardb_bs.out\0" \ 82 "scan_dev_for_boot_part=" \ 83 "part list ${devtype} ${devnum} devplist; " \ 84 "env exists devplist || setenv devplist 1; " \ 85 "for distro_bootpart in ${devplist}; do " \ 86 "if fstype ${devtype} " \ 87 "${devnum}:${distro_bootpart} " \ 88 "bootfstype; then " \ 89 "run scan_dev_for_boot; " \ 90 "fi; " \ 91 "done\0" \ 92 "boot_a_script=" \ 93 "load ${devtype} ${devnum}:${distro_bootpart} " \ 94 "${scriptaddr} ${prefix}${script}; " \ 95 "env exists secureboot && load ${devtype} " \ 96 "${devnum}:${distro_bootpart} " \ 97 "${scripthdraddr} ${prefix}${boot_script_hdr} " \ 98 "&& esbc_validate ${scripthdraddr};" \ 99 "source ${scriptaddr}\0" \ 100 "xspi_bootcmd=echo Trying load from FlexSPI flash ...;" \ 101 "sf probe 0:0 && sf read $load_addr " \ 102 "$kernel_start $kernel_size ; env exists secureboot &&" \ 103 "sf read $kernelheader_addr_r $kernelheader_start " \ 104 "$kernelheader_size && esbc_validate ${kernelheader_addr_r}; "\ 105 " bootm $load_addr#$board\0" \ 106 "xspi_hdploadcmd=echo Trying load HDP firmware from FlexSPI...;" \ 107 "sf probe 0:0 && sf read $load_addr 0x940000 0x30000 " \ 108 "&& hdp load $load_addr 0x2000\0" \ 109 "sd_bootcmd=echo Trying load from SD ...;" \ 110 "mmc dev 0;mmcinfo; mmc read $load_addr " \ 111 "$kernel_addr_sd $kernel_size_sd && " \ 112 "env exists secureboot && mmc read $kernelheader_addr_r " \ 113 "$kernelhdr_addr_sd $kernelhdr_size_sd " \ 114 " && esbc_validate ${kernelheader_addr_r};" \ 115 "bootm $load_addr#$board\0" \ 116 "sd_hdploadcmd=echo Trying load HDP firmware from SD..;" \ 117 "mmc dev 0;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ 118 "&& hdp load $load_addr 0x2000\0" \ 119 "emmc_bootcmd=echo Trying load from EMMC ..;" \ 120 "mmc dev 1;mmcinfo; mmc read $load_addr " \ 121 "$kernel_addr_sd $kernel_size_sd && " \ 122 "env exists secureboot && mmc read $kernelheader_addr_r " \ 123 "$kernelhdr_addr_sd $kernelhdr_size_sd " \ 124 " && esbc_validate ${kernelheader_addr_r};" \ 125 "bootm $load_addr#$board\0" \ 126 "emmc_hdploadcmd=echo Trying load HDP firmware from EMMC..;" \ 127 "mmc dev 1;mmcinfo;mmc read $load_addr 0x4a00 0x200 " \ 128 "&& hdp load $load_addr 0x2000\0" 129 #endif 130 #endif /* __LS1028A_RDB_H */ 131