1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2010-2011 Freescale Semiconductor, Inc. 4 * Copyright 2020 NXP 5 * Copyright 2022 Pali Rohár <pali@kernel.org> 6 */ 7 8 #include <linux/stringify.h> 9 10 #if !defined(CONFIG_SYS_SPD_BUS_NUM) || !defined(CFG_SYS_I2C_PCA9557_ADDR) 11 #error "CONFIG_SYS_SPD_BUS_NUM and CFG_SYS_I2C_PCA9557_ADDR are required" 12 #endif 13 14 #define __BOOTSRC_CMD(src, msk) i2c dev CONFIG_SYS_SPD_BUS_NUM; i2c mw CFG_SYS_I2C_PCA9557_ADDR 1 src 1; i2c mw CFG_SYS_I2C_PCA9557_ADDR 3 msk 1 15 16 #define __VAR_CMD(var, cmd) __stringify(var=cmd\0) 17 #define __VAR_CMD_RST(var, cmd) __VAR_CMD(var, cmd; reset) 18 19 #ifdef __SW_NOR_BANK_LO 20 #define MAP_NOR_LO_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_LO, __SW_NOR_BANK_MASK)) 21 #else 22 #define MAP_NOR_LO_CMD(var, ...) "" 23 #endif 24 25 #ifdef __SW_NOR_BANK_UP 26 #define MAP_NOR_UP_CMD(var, ...) __VAR_CMD(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_NOR_BANK_UP, __SW_NOR_BANK_MASK)) 27 #else 28 #define MAP_NOR_UP_CMD(var, ...) "" 29 #endif 30 31 #ifdef __SW_BOOT_NOR 32 #define RST_NOR_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR, __SW_BOOT_MASK)) 33 #else 34 #define RST_NOR_CMD(var, ...) "" 35 #endif 36 37 #ifdef __SW_BOOT_NOR_BANK_LO 38 #define RST_NOR_LO_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_LO, __SW_BOOT_MASK)) 39 #else 40 #define RST_NOR_LO_CMD(var, ...) "" 41 #endif 42 43 #ifdef __SW_BOOT_NOR_BANK_UP 44 #define RST_NOR_UP_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NOR_BANK_UP, __SW_BOOT_MASK)) 45 #else 46 #define RST_NOR_UP_CMD(var, ...) "" 47 #endif 48 49 #ifdef __SW_BOOT_SPI 50 #define RST_SPI_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SPI, __SW_BOOT_MASK)) 51 #else 52 #define RST_SPI_CMD(var, ...) "" 53 #endif 54 55 #ifdef __SW_BOOT_SD 56 #define RST_SD_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD, __SW_BOOT_MASK)) 57 #else 58 #define RST_SD_CMD(var, ...) "" 59 #endif 60 61 #ifdef __SW_BOOT_SD2 62 #define RST_SD2_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_SD2, __SW_BOOT_MASK)) 63 #else 64 #define RST_SD2_CMD(var, ...) "" 65 #endif 66 67 #ifdef __SW_BOOT_NAND 68 #define RST_NAND_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_NAND, __SW_BOOT_MASK)) 69 #else 70 #define RST_NAND_CMD(var, ...) "" 71 #endif 72 73 #ifdef __SW_BOOT_PCIE 74 #define RST_PCIE_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(__SW_BOOT_PCIE, __SW_BOOT_MASK)) 75 #else 76 #define RST_PCIE_CMD(var, ...) "" 77 #endif 78 79 #define RST_DEF_CMD(var, ...) __VAR_CMD_RST(var, __VA_ARGS__ __BOOTSRC_CMD(0x00, 0xff)) 80