1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2017 Rockchip Electronics Co., Ltd
4  */
5 
6 #ifndef __CONFIG_PX30_COMMON_H
7 #define __CONFIG_PX30_COMMON_H
8 
9 #include "rockchip-common.h"
10 
11 #define CFG_IRAM_BASE		0xff0e0000
12 
13 #define GICD_BASE			0xff131000
14 #define GICC_BASE			0xff132000
15 
16 #define CFG_SYS_SDRAM_BASE		0
17 #define SDRAM_MAX_SIZE			0xff000000
18 
19 #define ENV_MEM_LAYOUT_SETTINGS \
20 	"scriptaddr=0x00500000\0" \
21 	"script_offset_f=0xffe000\0" \
22 	"script_size_f=0x2000\0" \
23 	"pxefile_addr_r=0x00600000\0" \
24 	"fdt_addr_r=0x01e00000\0" \
25 	"fdtoverlay_addr_r=0x01f00000\0" \
26 	"kernel_addr_r=0x02080000\0" \
27 	"ramdisk_addr_r=0x06000000\0" \
28 	"kernel_comp_addr_r=0x08000000\0" \
29 	"kernel_comp_size=0x2000000\0"
30 
31 #define CFG_EXTRA_ENV_SETTINGS \
32 	ENV_MEM_LAYOUT_SETTINGS \
33 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
34 	"partitions=" PARTS_DEFAULT \
35 	ROCKCHIP_DEVICE_SETTINGS \
36 	"boot_targets=" BOOT_TARGETS "\0"
37 
38 #endif
39