1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2016 Rockchip Electronics Co., Ltd
4  */
5 #ifndef __CONFIG_RV1108_COMMON_H
6 #define __CONFIG_RV1108_COMMON_H
7 
8 #include "rockchip-common.h"
9 
10 #define CFG_IRAM_BASE		0x10080000
11 
12 #define CFG_SYS_TIMER_RATE		(24 * 1000 * 1000)
13 /* TIMER1,initialized by ddr initialize code */
14 #define CFG_SYS_TIMER_BASE		0x10350020
15 #define CFG_SYS_TIMER_COUNTER	(CFG_SYS_TIMER_BASE + 8)
16 
17 #define CFG_SYS_SDRAM_BASE		0x60000000
18 
19 #define ENV_MEM_LAYOUT_SETTINGS \
20 	"scriptaddr=0x60000000\0" \
21 	"fdt_addr_r=0x61f00000\0" \
22 	"kernel_addr_r=0x62000000\0" \
23 	"ramdisk_addr_r=0x64000000\0"
24 
25 #include <config_distro_bootcmd.h>
26 #define CFG_EXTRA_ENV_SETTINGS \
27 	ENV_MEM_LAYOUT_SETTINGS \
28 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
29 	"partitions=" PARTS_DEFAULT \
30 	"boot_targets=" BOOT_TARGETS "\0"
31 
32 #endif
33