1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2025 Andes Technology Corporation
4  * Randolph Lin, Andes Technology Corporation <randolph@andestech.com>
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 #define RISCV_MMODE_TIMERBASE           0xe6000000
11 #define RISCV_MMODE_TIMER_FREQ          60000000
12 
13 #define RISCV_SMODE_TIMER_FREQ          60000000
14 
15 /* support JEDEC */
16 #define PHYS_FLASH_1                   0x8000000       /* BANK 0 */
17 #define CFG_SYS_FLASH_BASE             PHYS_FLASH_1
18 #define CFG_SYS_FLASH_BANKS_LIST       { PHYS_FLASH_1, }
19 #define CFG_SYS_FLASH_BANKS_SIZES      { 0x4000000 }
20 
21 /* Enable distro boot */
22 #define BOOT_TARGET_DEVICES(func) \
23 	func(MMC, mmc, 0) \
24 	func(DHCP, dhcp, na)
25 
26 #include <config_distro_bootcmd.h>
27 
28 #define CFG_EXTRA_ENV_SETTINGS	\
29 				"fdt_high=0xffffffffffffffff\0" \
30 				"initrd_high=0xffffffffffffffff\0" \
31 				"kernel_addr_r=0x400600000\0" \
32 				"kernel_comp_addr_r=0x404600000\0" \
33 				"kernel_comp_size=0x04000000\0" \
34 				"pxefile_addr_r=0x408600000\0" \
35 				"scriptaddr=0x408700000\0" \
36 				"fdt_addr_r=0x408800000\0" \
37 				"ramdisk_addr_r=0x408900000\0" \
38 				BOOTENV
39 
40 #endif /* __CONFIG_H */
41