1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * (C) Copyright 2013 - 2017 Xilinx.
4  *
5  * Configuration settings for the Xilinx Zynq CSE board.
6  * See zynq-common.h for Zynq common configs
7  */
8 
9 #ifndef __CONFIG_ZYNQ_CSE_H
10 #define __CONFIG_ZYNQ_CSE_H
11 
12 #include <configs/zynq-common.h>
13 
14 /* Undef unneeded configs */
15 #undef CFG_EXTRA_ENV_SETTINGS
16 
17 #undef CFG_SYS_INIT_RAM_ADDR
18 #undef CFG_SYS_INIT_RAM_SIZE
19 #define CFG_SYS_INIT_RAM_ADDR	0xFFFDE000
20 #define CFG_SYS_INIT_RAM_SIZE	0x1000
21 
22 #endif /* __CONFIG_ZYNQ_CSE_H */
23