1 /* 2 * Copyright 2004, 2007 Freescale Semiconductor. 3 * Copyright(c) 2003 Motorola Inc. 4 */ 5 6 #ifndef __MPC85xx_H__ 7 #define __MPC85xx_H__ 8 9 #include <config.h> 10 #if defined(CONFIG_E500) 11 #include <e500.h> 12 #endif 13 14 /* 15 * SCCR - System Clock Control Register, 9-8 16 */ 17 #define SCCR_CLPD 0x00000004 /* CPM Low Power Disable */ 18 #define SCCR_DFBRG_MSK 0x00000003 /* Division by BRGCLK Mask */ 19 #define SCCR_DFBRG_SHIFT 0 20 21 #define SCCR_DFBRG00 0x00000000 /* BRGCLK division by 4 */ 22 #define SCCR_DFBRG01 0x00000001 /* BRGCLK div by 16 (normal) */ 23 #define SCCR_DFBRG10 0x00000002 /* BRGCLK division by 64 */ 24 #define SCCR_DFBRG11 0x00000003 /* BRGCLK division by 256 */ 25 26 /* 27 * Define default values for some CCSR macros to make header files cleaner* 28 * 29 * To completely disable CCSR relocation in a board header file, define 30 * CONFIG_SPL_SYS_CCSR_DO_NOT_RELOCATE. This will force CFG_SYS_CCSRBAR_PHYS 31 * to a value that is the same as CFG_SYS_CCSRBAR. 32 */ 33 34 #ifdef CFG_SYS_CCSRBAR_PHYS 35 #error "Do not define CFG_SYS_CCSRBAR_PHYS directly. Use \ 36 CFG_SYS_CCSRBAR_PHYS_LOW and/or CFG_SYS_CCSRBAR_PHYS_HIGH instead." 37 #endif 38 39 #if CONFIG_IS_ENABLED(SYS_CCSR_DO_NOT_RELOCATE) 40 #undef CFG_SYS_CCSRBAR_PHYS_HIGH 41 #undef CFG_SYS_CCSRBAR_PHYS_LOW 42 #define CFG_SYS_CCSRBAR_PHYS_HIGH 0 43 #endif 44 45 #ifndef CFG_SYS_CCSRBAR 46 #define CFG_SYS_CCSRBAR CONFIG_SYS_CCSRBAR_DEFAULT 47 #endif 48 49 #ifndef CFG_SYS_CCSRBAR_PHYS_HIGH 50 #ifdef CONFIG_PHYS_64BIT 51 #define CFG_SYS_CCSRBAR_PHYS_HIGH 0xf 52 #else 53 #define CFG_SYS_CCSRBAR_PHYS_HIGH 0 54 #endif 55 #endif 56 57 #ifndef CFG_SYS_CCSRBAR_PHYS_LOW 58 #define CFG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR_DEFAULT 59 #endif 60 61 #define CFG_SYS_CCSRBAR_PHYS ((CFG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \ 62 CFG_SYS_CCSRBAR_PHYS_LOW) 63 64 #endif /* __MPC85xx_H__ */ 65