1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2011 Freescale Semiconductor, Inc.
4  *	Andy Fleming <afleming@gmail.com>
5  *
6  * This file pretty much stolen from Linux's mii.h/ethtool.h/phy.h
7  */
8 
9 #ifndef _PHY_H
10 #define _PHY_H
11 
12 #include <asm-generic/gpio.h>
13 #include <log.h>
14 #include <phy_interface.h>
15 #include <dm/ofnode.h>
16 #include <dm/read.h>
17 #include <linux/errno.h>
18 #include <linux/list.h>
19 #include <linux/mii.h>
20 #include <linux/ethtool.h>
21 #include <linux/mdio.h>
22 
23 struct udevice;
24 
25 #define PHY_FIXED_ID		0xa5a55a5a
26 #define PHY_NCSI_ID            0xbeefcafe
27 
28 /*
29  * There is no actual id for this.
30  * This is just a dummy id for gmii2rgmmi converter.
31  */
32 #define PHY_GMII2RGMII_ID	0x5a5a5a5a
33 
34 #define PHY_MAX_ADDR 32
35 
36 #define PHY_FLAG_BROKEN_RESET	(1 << 0) /* soft reset not supported */
37 
38 #define PHY_DEFAULT_FEATURES	(SUPPORTED_Autoneg | \
39 				 SUPPORTED_TP | \
40 				 SUPPORTED_MII)
41 
42 #define PHY_10BT_FEATURES	(SUPPORTED_10baseT_Half | \
43 				 SUPPORTED_10baseT_Full)
44 
45 #define PHY_100BT_FEATURES	(SUPPORTED_100baseT_Half | \
46 				 SUPPORTED_100baseT_Full)
47 
48 #define PHY_1000BT_FEATURES	(SUPPORTED_1000baseT_Half | \
49 				 SUPPORTED_1000baseT_Full)
50 
51 #define PHY_BASIC_FEATURES	(PHY_10BT_FEATURES | \
52 				 PHY_100BT_FEATURES | \
53 				 PHY_DEFAULT_FEATURES)
54 
55 #define PHY_GBIT_FEATURES	(PHY_BASIC_FEATURES | \
56 				 PHY_1000BT_FEATURES)
57 
58 #define PHY_10G_FEATURES	(PHY_GBIT_FEATURES | \
59 				SUPPORTED_10000baseT_Full)
60 
61 struct phy_device;
62 
63 #define MDIO_NAME_LEN 32
64 
65 struct mii_dev {
66 	struct list_head link;
67 	char name[MDIO_NAME_LEN];
68 	void *priv;
69 	int (*read)(struct mii_dev *bus, int addr, int devad, int reg);
70 	int (*write)(struct mii_dev *bus, int addr, int devad, int reg,
71 			u16 val);
72 	int (*reset)(struct mii_dev *bus);
73 	struct phy_device *phymap[PHY_MAX_ADDR];
74 	u32 phy_mask;
75 	/** @reset_delay_us: Bus GPIO reset pulse width in microseconds */
76 	int reset_delay_us;
77 	/** @reset_post_delay_us: Bus GPIO reset deassert delay in microseconds */
78 	int reset_post_delay_us;
79 	/** @reset_gpiod: Bus Reset GPIO descriptor pointer */
80 	struct gpio_desc reset_gpiod;
81 };
82 
83 /* struct phy_driver: a structure which defines PHY behavior
84  *
85  * uid will contain a number which represents the PHY.  During
86  * startup, the driver will poll the PHY to find out what its
87  * UID--as defined by registers 2 and 3--is.  The 32-bit result
88  * gotten from the PHY will be masked to
89  * discard any bits which may change based on revision numbers
90  * unimportant to functionality
91  *
92  */
93 struct phy_driver {
94 	char *name;
95 	unsigned int uid;
96 	unsigned int mask;
97 	unsigned int mmds;
98 
99 	u32 features;
100 
101 	/* Called to do any driver startup necessities */
102 	/* Will be called during phy_connect */
103 	int (*probe)(struct phy_device *phydev);
104 
105 	/* Called to configure the PHY, and modify the controller
106 	 * based on the results.  Should be called after phy_connect */
107 	int (*config)(struct phy_device *phydev);
108 
109 	/* Called when starting up the controller */
110 	int (*startup)(struct phy_device *phydev);
111 
112 	/* Called when bringing down the controller */
113 	int (*shutdown)(struct phy_device *phydev);
114 
115 	int (*readext)(struct phy_device *phydev, int addr, int devad, int reg);
116 	int (*writeext)(struct phy_device *phydev, int addr, int devad, int reg,
117 			u16 val);
118 
119 	/* Phy specific driver override for reading a MMD register */
120 	int (*read_mmd)(struct phy_device *phydev, int devad, int reg);
121 
122 	/* Phy specific driver override for writing a MMD register */
123 	int (*write_mmd)(struct phy_device *phydev, int devad, int reg,
124 			 u16 val);
125 
126 	/* driver private data */
127 	ulong data;
128 };
129 
130 struct phy_device {
131 	/* Information about the PHY type */
132 	/* And management functions */
133 	struct mii_dev *bus;
134 	struct phy_driver *drv;
135 	void *priv;
136 
137 	struct udevice *dev;
138 	ofnode node;
139 
140 	/* forced speed & duplex (no autoneg)
141 	 * partner speed & duplex & pause (autoneg)
142 	 */
143 	int speed;
144 	int duplex;
145 
146 	/* The most recently read link state */
147 	int link;
148 	int port;
149 	phy_interface_t interface;
150 
151 	u32 advertising;
152 	u32 supported;
153 	u32 mmds;
154 
155 	int autoneg;
156 	int addr;
157 	int pause;
158 	int asym_pause;
159 	u32 phy_id;
160 	bool is_c45;
161 	u32 flags;
162 };
163 
164 struct fixed_link {
165 	int phy_id;
166 	int duplex;
167 	int link_speed;
168 	int pause;
169 	int asym_pause;
170 };
171 
172 /**
173  * phy_reset() - Resets the specified PHY
174  * Issues a reset of the PHY and waits for it to complete
175  *
176  * @phydev:	PHY to reset
177  * @return: 0 if OK, -ve on error
178  */
179 int phy_reset(struct phy_device *phydev);
180 
181 /**
182  * phy_gpio_reset() - Resets the specified PHY using GPIO reset
183  * Toggles the optional PHY reset GPIO
184  *
185  * @dev:	PHY udevice to reset
186  * @return: 0 if OK, -ve on error
187  */
188 int phy_gpio_reset(struct udevice *dev);
189 
190 /**
191  * phy_find_by_mask() - Searches for a PHY on the specified MDIO bus
192  * The function checks the PHY addresses flagged in phy_mask and returns a
193  * phy_device pointer if it detects a PHY.
194  * This function should only be called if just one PHY is expected to be present
195  * in the set of addresses flagged in phy_mask.  If multiple PHYs are present,
196  * it is undefined which of these PHYs is returned.
197  *
198  * @bus:	MII/MDIO bus to scan
199  * @phy_mask:	bitmap of PYH addresses to scan
200  * @return: pointer to phy_device if a PHY is found, or NULL otherwise
201  */
202 struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask);
203 
204 #ifdef CONFIG_PHY_FIXED
205 
206 /**
207  * fixed_phy_create() - create an unconnected fixed-link pseudo-PHY device
208  * @node: OF node for the container of the fixed-link node
209  *
210  * Description: Creates a struct phy_device based on a fixed-link of_node
211  * description. Can be used without phy_connect by drivers which do not expose
212  * a UCLASS_ETH udevice.
213  */
214 struct phy_device *fixed_phy_create(ofnode node);
215 
216 #else
217 
fixed_phy_create(ofnode node)218 static inline struct phy_device *fixed_phy_create(ofnode node)
219 {
220 	return NULL;
221 }
222 
223 #endif
224 
225 /**
226  * phy_connect() - Creates a PHY device for the Ethernet interface
227  * Creates a PHY device for the PHY at the given address, if one doesn't exist
228  * already, and associates it with the Ethernet device.
229  * The function may be called with addr <= 0, in this case addr value is ignored
230  * and the bus is scanned to detect a PHY.  Scanning should only be used if only
231  * one PHY is expected to be present on the MDIO bus, otherwise it is undefined
232  * which PHY is returned.
233  *
234  * @bus:	MII/MDIO bus that hosts the PHY
235  * @addr:	PHY address on MDIO bus
236  * @dev:	Ethernet device to associate to the PHY
237  * @interface:	type of MAC-PHY interface
238  * @return: pointer to phy_device if a PHY is found, or NULL otherwise
239  */
240 struct phy_device *phy_connect(struct mii_dev *bus, int addr,
241 				struct udevice *dev,
242 				phy_interface_t interface);
243 /**
244  * phy_device_create() - Create a PHY device
245  *
246  * @bus:		MII/MDIO bus that hosts the PHY
247  * @addr:		PHY address on MDIO bus
248  * @phy_id:		where to store the ID retrieved
249  * @is_c45:		Device Identifiers if is_c45
250  * @return: pointer to phy_device if a PHY is found, or NULL otherwise
251  */
252 struct phy_device *phy_device_create(struct mii_dev *bus, int addr,
253 				     u32 phy_id, bool is_c45);
254 
255 /**
256  * phy_connect_phy_id() - Connect to phy device by reading PHY id
257  *			  from phy node.
258  *
259  * @bus:		MII/MDIO bus that hosts the PHY
260  * @dev:		Ethernet device to associate to the PHY
261  * @return:		pointer to phy_device if a PHY is found,
262  *			or NULL otherwise
263  */
264 struct phy_device *phy_connect_phy_id(struct mii_dev *bus, struct udevice *dev,
265 				      int phyaddr);
266 
phy_get_ofnode(struct phy_device * phydev)267 static inline ofnode phy_get_ofnode(struct phy_device *phydev)
268 {
269 	if (ofnode_valid(phydev->node))
270 		return phydev->node;
271 	else
272 		return dev_ofnode(phydev->dev);
273 }
274 
275 /**
276  * phy_read_mmd_poll_timeout - Periodically poll a PHY register until a
277  *                             condition is met or a timeout occurs
278  *
279  * @phydev: The phy_device struct
280  * @devaddr: The MMD to read from
281  * @regnum: The register on the MMD to read
282  * @val: Variable to read the register into
283  * @cond: Break condition (usually involving @val)
284  * @sleep_us: Maximum time to sleep between reads in us (0
285  *            tight-loops).  Should be less than ~20ms since usleep_range
286  *            is used (see Documentation/timers/timers-howto.rst).
287  * @timeout_us: Timeout in us, 0 means never timeout
288  * @sleep_before_read: if it is true, sleep @sleep_us before read.
289  * Returns 0 on success and -ETIMEDOUT upon a timeout. In either
290  * case, the last read value at @args is stored in @val. Must not
291  * be called from atomic context if sleep_us or timeout_us are used.
292  */
293 #define phy_read_mmd_poll_timeout(phydev, devaddr, regnum, val, cond, \
294 				  sleep_us, timeout_us, sleep_before_read) \
295 ({ \
296 	int __ret = read_poll_timeout(phy_read_mmd, val, (cond) || val < 0, \
297 				  sleep_us, timeout_us, \
298 				  phydev, devaddr, regnum); \
299 	if (val <  0) \
300 		__ret = val; \
301 	if (__ret) \
302 		dev_err(phydev->dev, "%s failed: %d\n", __func__, __ret); \
303 	__ret; \
304 })
305 
306 int phy_read(struct phy_device *phydev, int devad, int regnum);
307 int phy_write(struct phy_device *phydev, int devad, int regnum, u16 val);
308 void phy_mmd_start_indirect(struct phy_device *phydev, int devad, int regnum);
309 int phy_read_mmd(struct phy_device *phydev, int devad, int regnum);
310 int phy_write_mmd(struct phy_device *phydev, int devad, int regnum, u16 val);
311 int phy_set_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
312 int phy_clear_bits_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
313 int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
314 			   u16 mask, u16 set);
315 int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
316 		   u16 mask, u16 set);
317 
318 int phy_startup(struct phy_device *phydev);
319 int phy_config(struct phy_device *phydev);
320 int phy_shutdown(struct phy_device *phydev);
321 int phy_set_supported(struct phy_device *phydev, u32 max_speed);
322 int phy_modify(struct phy_device *phydev, int devad, int regnum, u16 mask,
323 	       u16 set);
324 int genphy_config_aneg(struct phy_device *phydev);
325 int genphy_restart_aneg(struct phy_device *phydev);
326 int genphy_update_link(struct phy_device *phydev);
327 int genphy_parse_link(struct phy_device *phydev);
328 int genphy_config(struct phy_device *phydev);
329 int genphy_startup(struct phy_device *phydev);
330 int genphy_shutdown(struct phy_device *phydev);
331 int gen10g_config(struct phy_device *phydev);
332 int gen10g_startup(struct phy_device *phydev);
333 int gen10g_shutdown(struct phy_device *phydev);
334 int gen10g_discover_mmds(struct phy_device *phydev);
335 
336 /**
337  * phy_set_bits - Convenience function for setting bits in a PHY register
338  * @phydev: the phy_device struct
339  * @devad: The MMD to read from
340  * @regnum: register number to write
341  * @val: bits to set
342  */
phy_set_bits(struct phy_device * phydev,int devad,u32 regnum,u16 val)343 static inline int phy_set_bits(struct phy_device *phydev, int devad, u32 regnum, u16 val)
344 {
345 	return phy_modify(phydev, devad, regnum, 0, val);
346 }
347 
348 /**
349  * phy_clear_bits - Convenience function for clearing bits in a PHY register
350  * @phydev: the phy_device struct
351  * @devad: The MMD to write to
352  * @regnum: register number to write
353  * @val: bits to clear
354  */
phy_clear_bits(struct phy_device * phydev,int devad,u32 regnum,u16 val)355 static inline int phy_clear_bits(struct phy_device *phydev, int devad, u32 regnum, u16 val)
356 {
357 	return phy_modify(phydev, devad, regnum, val, 0);
358 }
359 
360 /**
361  * U_BOOT_PHY_DRIVER() - Declare a new U-Boot driver
362  * @__name: name of the driver
363  */
364 #define U_BOOT_PHY_DRIVER(__name)					\
365 	ll_entry_declare(struct phy_driver, __name, phy_driver)
366 
367 int board_phy_config(struct phy_device *phydev);
368 int get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id);
369 
370 /**
371  * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
372  * is RGMII (all variants)
373  * @phydev: the phy_device struct
374  * @return: true if MII bus is RGMII or false if it is not
375  */
phy_interface_is_rgmii(struct phy_device * phydev)376 static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
377 {
378 	switch (phydev->interface) {
379 	case PHY_INTERFACE_MODE_RGMII:
380 	case PHY_INTERFACE_MODE_RGMII_ID:
381 	case PHY_INTERFACE_MODE_RGMII_RXID:
382 	case PHY_INTERFACE_MODE_RGMII_TXID:
383 		return 1;
384 	default:
385 		return 0;
386 	}
387 }
388 
389 bool phy_interface_is_ncsi(void);
390 
391 /* PHY UIDs for various PHYs that are referenced in external code */
392 #define PHY_UID_CS4340		0x13e51002
393 #define PHY_UID_CS4223		0x03e57003
394 #define PHY_UID_TN2020		0x00a19410
395 #define PHY_UID_IN112525_S03	0x02107440
396 
397 #endif
398