1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2017-2018 Texas Instruments Incorporated - https://www.ti.com/
4  * Jean-Jacques Hiblot <jjhiblot@ti.com>
5  */
6 
7 #include <dm.h>
8 #include <mux.h>
9 #include <regmap.h>
10 #include <syscon.h>
11 #include <asm/test.h>
12 #include <dm/test.h>
13 #include <dm/device-internal.h>
14 #include <test/ut.h>
15 
dm_test_mux_mmio_select(struct unit_test_state * uts)16 static int dm_test_mux_mmio_select(struct unit_test_state *uts)
17 {
18 	struct udevice *dev, *dev_b;
19 	struct regmap *map;
20 	struct mux_control *ctl0_a, *ctl0_b;
21 	struct mux_control *ctl1;
22 	struct mux_control *ctl_err;
23 	u32 val;
24 	int i;
25 
26 	sandbox_set_enable_memio(true);
27 
28 	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
29 					      &dev));
30 	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
31 					      &dev_b));
32 	map = syscon_regmap_lookup_by_phandle(dev, "mux-syscon");
33 	ut_assertok_ptr(map);
34 	ut_assert(map);
35 
36 	ut_assertok(mux_control_get(dev, "mux0", &ctl0_a));
37 	ut_assertok(mux_control_get(dev, "mux1", &ctl1));
38 	ut_asserteq(-ERANGE, mux_control_get(dev, "mux3", &ctl_err));
39 	ut_asserteq(-ENODATA, mux_control_get(dev, "dummy", &ctl_err));
40 	ut_assertok(mux_control_get(dev_b, "mux0", &ctl0_b));
41 
42 	for (i = 0; i < mux_control_states(ctl0_a); i++) {
43 		/* Select a new state and verify the value in the regmap. */
44 		ut_assertok(mux_control_select(ctl0_a, i));
45 		ut_assertok(regmap_read(map, 0, &val));
46 		ut_asserteq(i, (val & 0x30) >> 4);
47 		/*
48 		 * Deselect the mux and verify that the value in the regmap
49 		 * reflects the idle state (fixed to MUX_IDLE_AS_IS).
50 		 */
51 		ut_assertok(mux_control_deselect(ctl0_a));
52 		ut_assertok(regmap_read(map, 0, &val));
53 		ut_asserteq(i, (val & 0x30) >> 4);
54 	}
55 
56 	for (i = 0; i < mux_control_states(ctl1); i++) {
57 		/* Select a new state and verify the value in the regmap. */
58 		ut_assertok(mux_control_select(ctl1, i));
59 		ut_assertok(regmap_read(map, 0xc, &val));
60 		ut_asserteq(i, (val & 0x1E) >> 1);
61 		/*
62 		 * Deselect the mux and verify that the value in the regmap
63 		 * reflects the idle state (fixed to 2).
64 		 */
65 		ut_assertok(mux_control_deselect(ctl1));
66 		ut_assertok(regmap_read(map, 0xc, &val));
67 		ut_asserteq(2, (val & 0x1E) >> 1);
68 	}
69 
70 	/* Try unbalanced selection/deselection. */
71 	ut_assertok(mux_control_select(ctl0_a, 0));
72 	ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 1));
73 	ut_asserteq(-EBUSY, mux_control_select(ctl0_a, 0));
74 	ut_assertok(mux_control_deselect(ctl0_a));
75 
76 	/* Try concurrent selection. */
77 	ut_assertok(mux_control_select(ctl0_a, 0));
78 	ut_assert(mux_control_select(ctl0_b, 0));
79 	ut_assertok(mux_control_deselect(ctl0_a));
80 	ut_assertok(mux_control_select(ctl0_b, 0));
81 	ut_assert(mux_control_select(ctl0_a, 0));
82 	ut_assertok(mux_control_deselect(ctl0_b));
83 	ut_assertok(mux_control_select(ctl0_a, 0));
84 	ut_assertok(mux_control_deselect(ctl0_a));
85 
86 	return 0;
87 }
88 DM_TEST(dm_test_mux_mmio_select, UTF_SCAN_PDATA | UTF_SCAN_FDT);
89 
90 /* Test that managed API for mux work correctly */
dm_test_devm_mux_mmio(struct unit_test_state * uts)91 static int dm_test_devm_mux_mmio(struct unit_test_state *uts)
92 {
93 	struct udevice *dev, *dev_b;
94 	struct mux_control *ctl0_a, *ctl0_b;
95 	struct mux_control *ctl1;
96 	struct mux_control *ctl_err;
97 
98 	sandbox_set_enable_memio(true);
99 
100 	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "a-test",
101 					      &dev));
102 	ut_assertok(uclass_get_device_by_name(UCLASS_TEST_FDT, "b-test",
103 					      &dev_b));
104 
105 	ctl0_a = devm_mux_control_get(dev, "mux0");
106 	ut_assertok_ptr(ctl0_a);
107 	ut_assert(ctl0_a);
108 	ctl1 = devm_mux_control_get(dev, "mux1");
109 	ut_assertok_ptr(ctl1);
110 	ut_assert(ctl1);
111 	ctl_err = devm_mux_control_get(dev, "mux3");
112 	ut_asserteq(-ERANGE, PTR_ERR(ctl_err));
113 	ctl_err = devm_mux_control_get(dev, "dummy");
114 	ut_asserteq(-ENODATA, PTR_ERR(ctl_err));
115 
116 	ctl0_b = devm_mux_control_get(dev_b, "mux0");
117 	ut_assertok_ptr(ctl0_b);
118 	ut_assert(ctl0_b);
119 
120 	/* Try concurrent selection. */
121 	ut_assertok(mux_control_select(ctl0_a, 0));
122 	ut_assert(mux_control_select(ctl0_b, 0));
123 	ut_assertok(mux_control_deselect(ctl0_a));
124 	ut_assertok(mux_control_select(ctl0_b, 0));
125 	ut_assert(mux_control_select(ctl0_a, 0));
126 	ut_assertok(mux_control_deselect(ctl0_b));
127 
128 	/* Remove one device and check that the mux is released. */
129 	ut_assertok(mux_control_select(ctl0_a, 0));
130 	ut_assert(mux_control_select(ctl0_b, 0));
131 	device_remove(dev, DM_REMOVE_NORMAL);
132 	ut_assertok(mux_control_select(ctl0_b, 0));
133 
134 	device_remove(dev_b, DM_REMOVE_NORMAL);
135 	return 0;
136 }
137 DM_TEST(dm_test_devm_mux_mmio, UTF_SCAN_PDATA | UTF_SCAN_FDT);
138