1 /* A memset for CRIS.
2    Copyright (C) 1999-2008 Axis Communications.
3    All rights reserved.
4 
5    Redistribution and use in source and binary forms, with or without
6    modification, are permitted provided that the following conditions
7    are met:
8 
9    1. Redistributions of source code must retain the above copyright
10       notice, this list of conditions and the following disclaimer.
11 
12    2. Neither the name of Axis Communications nor the names of its
13       contributors may be used to endorse or promote products derived
14       from this software without specific prior written permission.
15 
16    THIS SOFTWARE IS PROVIDED BY AXIS COMMUNICATIONS AND ITS CONTRIBUTORS
17    ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18    LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19    A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL AXIS
20    COMMUNICATIONS OR ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
21    INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
22    (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
23    SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24    HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
25    STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
26    IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27    POSSIBILITY OF SUCH DAMAGE.  */
28 
29 /* FIXME: This file should really only be used for reference, as the
30    result is somewhat depending on gcc generating what we expect rather
31    than what we describe.  An assembly file should be used instead.  */
32 
33 #include <string.h>
34 
35 /* Note the multiple occurrence of the expression "12*4", including the
36    asm.  It is hard to get it into the asm in a good way.  Thus better to
37    expose the problem everywhere: no macro.  */
38 
39 /* Assuming one cycle per dword written or read (ok, not really true; the
40    world is not ideal), and one cycle per instruction, then 43+3*(n/48-1)
41    <= 24+24*(n/48-1) so n >= 45.7; n >= 0.9; we win on the first full
42    48-byte block to set.  */
43 
44 #define MEMSET_BY_BLOCK_THRESHOLD (1 * 48)
45 
46 /* No name ambiguities in this file.  */
47 __asm__ (".syntax no_register_prefix");
48 
memset(void * pdst,int c,unsigned int plen)49 void *memset(void *pdst, int c, unsigned int plen)
50 {
51   /* Now we want the parameters in special registers.  Make sure the
52      compiler does something usable with this.  */
53 
54   register char *return_dst __asm__ ("r10") = pdst;
55   register int n __asm__ ("r12") = plen;
56   register int lc __asm__ ("r11") = c;
57 
58   /* Most apps use memset sanely.  Memsetting about 3..4 bytes or less get
59      penalized here compared to the generic implementation.  */
60 
61   /* This is fragile performancewise at best.  Check with newer GCC
62      releases, if they compile cascaded "x |= x << 8" to sane code.  */
63   __asm__("movu.b %0,r13                                                \n\
64            lslq 8,r13                                                   \n\
65            move.b %0,r13                                                \n\
66            move.d r13,%0                                                \n\
67            lslq 16,r13                                                  \n\
68            or.d r13,%0"
69           : "=r" (lc)           /* Inputs.  */
70           : "0" (lc)            /* Outputs.  */
71           : "r13");             /* Trash.  */
72 
73   {
74     register char *dst __asm__ ("r13") = pdst;
75 
76     if (((unsigned long) pdst & 3) != 0
77         /* Oops! n = 0 must be a valid call, regardless of alignment.  */
78         && n >= 3)
79       {
80         if ((unsigned long) dst & 1)
81           {
82             *dst = (char) lc;
83             n--;
84             dst++;
85           }
86 
87         if ((unsigned long) dst & 2)
88           {
89             *(short *) dst = lc;
90             n -= 2;
91             dst += 2;
92           }
93       }
94 
95     /* Decide which setting method to use.  */
96     if (n >= MEMSET_BY_BLOCK_THRESHOLD)
97       {
98         /* It is not optimal to tell the compiler about clobbering any
99            registers; that will move the saving/restoring of those registers
100            to the function prologue/epilogue, and make non-block sizes
101            suboptimal.  */
102         __asm__ __volatile__
103           ("\
104            ;; GCC does promise correct register allocations, but let's  \n\
105            ;; make sure it keeps its promises.                          \n\
106            .ifnc %0-%1-%4,$r13-$r12-$r11                                \n\
107            .error \"GCC reg alloc bug: %0-%1-%4 != $r13-$r12-$r11\"     \n\
108            .endif                                                       \n\
109                                                                         \n\
110            ;; Save the registers we'll clobber in the movem process     \n\
111            ;; on the stack.  Don't mention them to gcc, it will only be \n\
112            ;; upset.                                                    \n\
113            subq    11*4,sp                                              \n\
114            movem   r10,[sp]                                             \n\
115                                                                         \n\
116            move.d  r11,r0                                               \n\
117            move.d  r11,r1                                               \n\
118            move.d  r11,r2                                               \n\
119            move.d  r11,r3                                               \n\
120            move.d  r11,r4                                               \n\
121            move.d  r11,r5                                               \n\
122            move.d  r11,r6                                               \n\
123            move.d  r11,r7                                               \n\
124            move.d  r11,r8                                               \n\
125            move.d  r11,r9                                               \n\
126            move.d  r11,r10                                              \n\
127                                                                         \n\
128            ;; Now we've got this:                                       \n\
129            ;; r13 - dst                                                 \n\
130            ;; r12 - n                                                   \n\
131                                                                         \n\
132            ;; Update n for the first loop                               \n\
133            subq    12*4,r12                                             \n\
134 0:                                                                      \n\
135 "
136 #ifdef __arch_common_v10_v32
137            /* Cater to branch offset difference between v32 and v10.  We
138               assume the branch below has an 8-bit offset.  */
139 "          setf\n"
140 #endif
141 "          subq   12*4,r12                                              \n\
142            bge     0b                                                   \n\
143            movem        r11,[r13+]                                      \n\
144                                                                         \n\
145            ;; Compensate for last loop underflowing n.                  \n\
146            addq   12*4,r12                                              \n\
147                                                                         \n\
148            ;; Restore registers from stack.                             \n\
149            movem [sp+],r10"
150 
151            /* Outputs.  */
152            : "=r" (dst), "=r" (n)
153 
154            /* Inputs.  */
155            : "0" (dst), "1" (n), "r" (lc));
156       }
157 
158     /* An ad-hoc unroll, used for 4*12-1..16 bytes. */
159     while (n >= 16)
160       {
161         *(long *) dst = lc; dst += 4;
162         *(long *) dst = lc; dst += 4;
163         *(long *) dst = lc; dst += 4;
164         *(long *) dst = lc; dst += 4;
165         n -= 16;
166       }
167 
168     switch (n)
169       {
170       case 0:
171         break;
172 
173       case 1:
174         *dst = (char) lc;
175         break;
176 
177       case 2:
178         *(short *) dst = (short) lc;
179         break;
180 
181       case 3:
182         *(short *) dst = (short) lc; dst += 2;
183         *dst = (char) lc;
184         break;
185 
186       case 4:
187         *(long *) dst = lc;
188         break;
189 
190       case 5:
191         *(long *) dst = lc; dst += 4;
192         *dst = (char) lc;
193         break;
194 
195       case 6:
196         *(long *) dst = lc; dst += 4;
197         *(short *) dst = (short) lc;
198         break;
199 
200       case 7:
201         *(long *) dst = lc; dst += 4;
202         *(short *) dst = (short) lc; dst += 2;
203         *dst = (char) lc;
204         break;
205 
206       case 8:
207         *(long *) dst = lc; dst += 4;
208         *(long *) dst = lc;
209         break;
210 
211       case 9:
212         *(long *) dst = lc; dst += 4;
213         *(long *) dst = lc; dst += 4;
214         *dst = (char) lc;
215         break;
216 
217       case 10:
218         *(long *) dst = lc; dst += 4;
219         *(long *) dst = lc; dst += 4;
220         *(short *) dst = (short) lc;
221         break;
222 
223       case 11:
224         *(long *) dst = lc; dst += 4;
225         *(long *) dst = lc; dst += 4;
226         *(short *) dst = (short) lc; dst += 2;
227         *dst = (char) lc;
228         break;
229 
230       case 12:
231         *(long *) dst = lc; dst += 4;
232         *(long *) dst = lc; dst += 4;
233         *(long *) dst = lc;
234         break;
235 
236       case 13:
237         *(long *) dst = lc; dst += 4;
238         *(long *) dst = lc; dst += 4;
239         *(long *) dst = lc; dst += 4;
240         *dst = (char) lc;
241         break;
242 
243       case 14:
244         *(long *) dst = lc; dst += 4;
245         *(long *) dst = lc; dst += 4;
246         *(long *) dst = lc; dst += 4;
247         *(short *) dst = (short) lc;
248         break;
249 
250       case 15:
251         *(long *) dst = lc; dst += 4;
252         *(long *) dst = lc; dst += 4;
253         *(long *) dst = lc; dst += 4;
254         *(short *) dst = (short) lc; dst += 2;
255         *dst = (char) lc;
256         break;
257       }
258   }
259 
260   return return_dst;
261 }
262 libc_hidden_def(memset)
263