1 /* 68k FPU control word definitions. 2 Copyright (C) 1996-2025 Free Software Foundation, Inc. 3 4 The GNU C Library is free software; you can redistribute it and/or 5 modify it under the terms of the GNU Lesser General Public 6 License as published by the Free Software Foundation; either 7 version 2.1 of the License, or (at your option) any later version. 8 9 The GNU C Library is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 Lesser General Public License for more details. 13 14 You should have received a copy of the GNU Lesser General Public 15 License along with the GNU C Library. If not, see 16 <https://www.gnu.org/licenses/>. */ 17 18 #ifndef _FPU_CONTROL_H 19 #define _FPU_CONTROL_H 20 21 /* 22 * Motorola floating point control register bits. 23 * 24 * 31-16 -> reserved (read as 0, ignored on write) 25 * 15 -> enable trap for BSUN exception 26 * 14 -> enable trap for SNAN exception 27 * 13 -> enable trap for OPERR exception 28 * 12 -> enable trap for OVFL exception 29 * 11 -> enable trap for UNFL exception 30 * 10 -> enable trap for DZ exception 31 * 9 -> enable trap for INEX2 exception (INEX on Coldfire) 32 * 8 -> enable trap for INEX1 exception (IDE on Coldfire) 33 * 7-6 -> Precision Control (only bit 6 is used on Coldfire) 34 * 5-4 -> Rounding Control 35 * 3-0 -> zero (read as 0, write as 0) 36 * 37 * 38 * Precision Control: 39 * 00 - round to extended precision 40 * 01 - round to single precision 41 * 10 - round to double precision 42 * 11 - undefined 43 * 44 * Rounding Control: 45 * 00 - rounding to nearest (RN) 46 * 01 - rounding toward zero (RZ) 47 * 10 - rounding (down)toward minus infinity (RM) 48 * 11 - rounding (up) toward plus infinity (RP) 49 * 50 * The hardware default is 0x0000. I choose 0x5400. 51 */ 52 53 #include <features.h> 54 55 #if defined (__mcoldfire__) && !defined (__mcffpu__) 56 57 # define _FPU_RESERVED 0xffffffff 58 # define _FPU_DEFAULT 0x00000000 59 # define _FPU_GETCW(cw) ((cw) = 0) 60 # define _FPU_SETCW(cw) ((void) (cw)) 61 62 #else 63 64 /* masking of interrupts */ 65 # define _FPU_MASK_BSUN 0x8000 66 # define _FPU_MASK_SNAN 0x4000 67 # define _FPU_MASK_OPERR 0x2000 68 # define _FPU_MASK_OVFL 0x1000 69 # define _FPU_MASK_UNFL 0x0800 70 # define _FPU_MASK_DZ 0x0400 71 # define _FPU_MASK_INEX1 0x0200 72 # define _FPU_MASK_INEX2 0x0100 73 74 /* precision control */ 75 # ifdef __mcoldfire__ 76 # define _FPU_DOUBLE 0x00 77 # else 78 # define _FPU_EXTENDED 0x00 /* RECOMMENDED */ 79 # define _FPU_DOUBLE 0x80 80 # endif 81 # define _FPU_SINGLE 0x40 /* DO NOT USE */ 82 83 /* rounding control */ 84 # define _FPU_RC_NEAREST 0x00 /* RECOMMENDED */ 85 # define _FPU_RC_ZERO 0x10 86 # define _FPU_RC_DOWN 0x20 87 # define _FPU_RC_UP 0x30 88 89 # ifdef __mcoldfire__ 90 # define _FPU_RESERVED 0xFFFF800F 91 # else 92 # define _FPU_RESERVED 0xFFFF000F /* Reserved bits in fpucr */ 93 # endif 94 95 96 /* Now two recommended fpucr */ 97 98 /* The fdlibm code requires no interrupts for exceptions. Don't 99 change the rounding mode, it would break long double I/O! */ 100 # define _FPU_DEFAULT 0x00000000 101 102 /* IEEE: same as above, but exceptions. We must make it non-zero so 103 that __setfpucw works. This bit will be ignored. */ 104 # define _FPU_IEEE 0x00000001 105 106 /* Macros for accessing the hardware control word. */ 107 # define _FPU_GETCW(cw) __asm__ ("fmove%.l %!, %0" : "=dm" (cw)) 108 # define _FPU_SETCW(cw) __asm__ volatile ("fmove%.l %0, %!" : : "dm" (cw)) 109 #endif 110 111 /* Type of the control word. */ 112 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__))); 113 114 /* Default control word set at startup. */ 115 extern fpu_control_t __fpu_control; 116 117 #endif /* _M68K_FPU_CONTROL_H */ 118