1 /* FPU control word bits. Mips version. 2 Copyright (C) 1996-2025 Free Software Foundation, Inc. 3 4 The GNU C Library is free software; you can redistribute it and/or 5 modify it under the terms of the GNU Lesser General Public 6 License as published by the Free Software Foundation; either 7 version 2.1 of the License, or (at your option) any later version. 8 9 The GNU C Library is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 Lesser General Public License for more details. 13 14 You should have received a copy of the GNU Lesser General Public 15 License along with the GNU C Library. If not, see 16 <https://www.gnu.org/licenses/>. */ 17 18 #ifndef _FPU_CONTROL_H 19 #define _FPU_CONTROL_H 20 21 /* MIPS FPU floating point control register bits. 22 * 23 * 31-25 -> floating point conditions code bits 7-1. These bits are only 24 * available in MIPS IV. 25 * 24 -> flush denormalized results to zero instead of 26 * causing unimplemented operation exception. This bit is only 27 * available for MIPS III and newer. 28 * 23 -> Condition bit 29 * 22-21 -> reserved for architecture implementers 30 * 20 -> reserved (read as 0, write with 0) 31 * 19 -> IEEE 754-2008 non-arithmetic ABS.fmt and NEG.fmt enable 32 * 18 -> IEEE 754-2008 recommended NaN encoding enable 33 * 17 -> cause bit for unimplemented operation 34 * 16 -> cause bit for invalid exception 35 * 15 -> cause bit for division by zero exception 36 * 14 -> cause bit for overflow exception 37 * 13 -> cause bit for underflow exception 38 * 12 -> cause bit for inexact exception 39 * 11 -> enable exception for invalid exception 40 * 10 -> enable exception for division by zero exception 41 * 9 -> enable exception for overflow exception 42 * 8 -> enable exception for underflow exception 43 * 7 -> enable exception for inexact exception 44 * 6 -> flag invalid exception 45 * 5 -> flag division by zero exception 46 * 4 -> flag overflow exception 47 * 3 -> flag underflow exception 48 * 2 -> flag inexact exception 49 * 1-0 -> rounding control 50 * 51 * 52 * Rounding Control: 53 * 00 - rounding to nearest (RN) 54 * 01 - rounding toward zero (RZ) 55 * 10 - rounding (up) toward plus infinity (RP) 56 * 11 - rounding (down)toward minus infinity (RM) 57 */ 58 59 #include <features.h> 60 61 #ifdef __mips_soft_float 62 63 #define _FPU_RESERVED 0xffffffff 64 #define _FPU_DEFAULT 0x00000000 65 typedef unsigned int fpu_control_t; 66 #define _FPU_GETCW(cw) (cw) = 0 67 #define _FPU_SETCW(cw) (void) (cw) 68 extern fpu_control_t __fpu_control; 69 70 #else /* __mips_soft_float */ 71 72 /* Masks for interrupts. */ 73 #define _FPU_MASK_V 0x0800 /* Invalid operation */ 74 #define _FPU_MASK_Z 0x0400 /* Division by zero */ 75 #define _FPU_MASK_O 0x0200 /* Overflow */ 76 #define _FPU_MASK_U 0x0100 /* Underflow */ 77 #define _FPU_MASK_I 0x0080 /* Inexact operation */ 78 79 /* Flush denormalized numbers to zero. */ 80 #define _FPU_FLUSH_TZ 0x1000000 81 82 /* IEEE 754-2008 compliance control. */ 83 #define _FPU_ABS2008 0x80000 84 #define _FPU_NAN2008 0x40000 85 86 /* Rounding control. */ 87 #define _FPU_RC_NEAREST 0x0 /* RECOMMENDED */ 88 #define _FPU_RC_ZERO 0x1 89 #define _FPU_RC_UP 0x2 90 #define _FPU_RC_DOWN 0x3 91 /* Mask for rounding control. */ 92 #define _FPU_RC_MASK 0x3 93 94 #define _FPU_RESERVED 0xfe8c0000 /* Reserved bits in cw, incl ABS/NAN2008. */ 95 96 97 /* The fdlibm code requires strict IEEE double precision arithmetic, 98 and no interrupts for exceptions, rounding to nearest. */ 99 #ifdef __mips_nan2008 100 # define _FPU_DEFAULT 0x000C0000 101 #else 102 # define _FPU_DEFAULT 0x00000000 103 #endif 104 105 /* IEEE: same as above, but exceptions. */ 106 #ifdef __mips_nan2008 107 # define _FPU_IEEE 0x000C0F80 108 #else 109 # define _FPU_IEEE 0x00000F80 110 #endif 111 112 /* Type of the control word. */ 113 typedef unsigned int fpu_control_t __attribute__ ((__mode__ (__SI__))); 114 115 /* Macros for accessing the hardware control word. */ 116 extern fpu_control_t __mips_fpu_getcw (void) __THROW; 117 extern void __mips_fpu_setcw (fpu_control_t) __THROW; 118 #ifdef __mips16 119 # define _FPU_GETCW(cw) do { (cw) = __mips_fpu_getcw (); } while (0) 120 # define _FPU_SETCW(cw) __mips_fpu_setcw (cw) 121 #else 122 # define _FPU_GETCW(cw) __asm__ volatile ("cfc1 %0,$31" : "=r" (cw)) 123 # define _FPU_SETCW(cw) __asm__ volatile ("ctc1 %0,$31" : : "r" (cw)) 124 #endif 125 126 /* Default control word set at startup. */ 127 extern fpu_control_t __fpu_control; 128 129 #endif /* __mips_soft_float */ 130 131 #endif /* fpu_control.h */ 132