1 /* Copyright (C) 1997, 1998, 1999, 2004, 2006 Free Software Foundation, Inc. 2 This file is part of the GNU C Library. 3 4 The GNU C Library is free software; you can redistribute it and/or 5 modify it under the terms of the GNU Lesser General Public 6 License as published by the Free Software Foundation; either 7 version 2.1 of the License, or (at your option) any later version. 8 9 The GNU C Library is distributed in the hope that it will be useful, 10 but WITHOUT ANY WARRANTY; without even the implied warranty of 11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 12 Lesser General Public License for more details. 13 14 You should have received a copy of the GNU Lesser General Public 15 License along with the GNU C Library; if not, see 16 <http://www.gnu.org/licenses/>. */ 17 18 #ifndef _FENV_H 19 # error "Never use <bits/fenv.h> directly; include <fenv.h> instead." 20 #endif 21 22 #include <features.h> 23 24 #ifdef __CONFIG_E500__ 25 26 /* Define bits representing the exception. We use the bit positions of 27 the appropriate bits in the SPEFSCR... */ 28 enum 29 { 30 FE_INEXACT = 1 << (63 - 42), 31 #define FE_INEXACT FE_INEXACT 32 FE_INVALID = 1 << (63 - 43), 33 #define FE_INVALID FE_INVALID 34 FE_DIVBYZERO = 1 << (63 - 44), 35 #define FE_DIVBYZERO FE_DIVBYZERO 36 FE_UNDERFLOW = 1 << (63 - 45), 37 #define FE_UNDERFLOW FE_UNDERFLOW 38 FE_OVERFLOW = 1 << (63 - 46) 39 #define FE_OVERFLOW FE_OVERFLOW 40 }; 41 42 #else /* PowerPC 6xx floating-point. */ 43 44 /* Define bits representing the exception. We use the bit positions of 45 the appropriate bits in the FPSCR... */ 46 enum 47 { 48 FE_INEXACT = 1 << (31 - 6), 49 #define FE_INEXACT FE_INEXACT 50 FE_DIVBYZERO = 1 << (31 - 5), 51 #define FE_DIVBYZERO FE_DIVBYZERO 52 FE_UNDERFLOW = 1 << (31 - 4), 53 #define FE_UNDERFLOW FE_UNDERFLOW 54 FE_OVERFLOW = 1 << (31 - 3), 55 #define FE_OVERFLOW FE_OVERFLOW 56 57 /* ... except for FE_INVALID, for which we use bit 31. FE_INVALID 58 actually corresponds to bits 7 through 12 and 21 through 23 59 in the FPSCR, but we can't use that because the current draft 60 says that it must be a power of 2. Instead we use bit 2 which 61 is the summary bit for all the FE_INVALID exceptions, which 62 kind of makes sense. */ 63 FE_INVALID = 1 << (31 - 2), 64 #define FE_INVALID FE_INVALID 65 66 #ifdef __USE_GNU 67 /* Breakdown of the FE_INVALID bits. Setting FE_INVALID on an 68 input to a routine is equivalent to setting all of these bits; 69 FE_INVALID will be set on output from a routine iff one of 70 these bits is set. Note, though, that you can't disable or 71 enable these exceptions individually. */ 72 73 /* Operation with SNaN. */ 74 FE_INVALID_SNAN = 1 << (31 - 7), 75 # define FE_INVALID_SNAN FE_INVALID_SNAN 76 77 /* Inf - Inf */ 78 FE_INVALID_ISI = 1 << (31 - 8), 79 # define FE_INVALID_ISI FE_INVALID_ISI 80 81 /* Inf / Inf */ 82 FE_INVALID_IDI = 1 << (31 - 9), 83 # define FE_INVALID_IDI FE_INVALID_IDI 84 85 /* 0 / 0 */ 86 FE_INVALID_ZDZ = 1 << (31 - 10), 87 # define FE_INVALID_ZDZ FE_INVALID_ZDZ 88 89 /* Inf * 0 */ 90 FE_INVALID_IMZ = 1 << (31 - 11), 91 # define FE_INVALID_IMZ FE_INVALID_IMZ 92 93 /* Comparison with NaN or SNaN. */ 94 FE_INVALID_COMPARE = 1 << (31 - 12), 95 # define FE_INVALID_COMPARE FE_INVALID_COMPARE 96 97 /* Invalid operation flag for software (not set by hardware). */ 98 /* Note that some chips don't have this implemented, presumably 99 because no-one expected anyone to write software for them %-). */ 100 FE_INVALID_SOFTWARE = 1 << (31 - 21), 101 # define FE_INVALID_SOFTWARE FE_INVALID_SOFTWARE 102 103 /* Square root of negative number (including -Inf). */ 104 /* Note that some chips don't have this implemented. */ 105 FE_INVALID_SQRT = 1 << (31 - 22), 106 # define FE_INVALID_SQRT FE_INVALID_SQRT 107 108 /* Conversion-to-integer of a NaN or a number too large or too small. */ 109 FE_INVALID_INTEGER_CONVERSION = 1 << (31 - 23) 110 # define FE_INVALID_INTEGER_CONVERSION FE_INVALID_INTEGER_CONVERSION 111 112 # define FE_ALL_INVALID \ 113 (FE_INVALID_SNAN | FE_INVALID_ISI | FE_INVALID_IDI | FE_INVALID_ZDZ \ 114 | FE_INVALID_IMZ | FE_INVALID_COMPARE | FE_INVALID_SOFTWARE \ 115 | FE_INVALID_SQRT | FE_INVALID_INTEGER_CONVERSION) 116 #endif /* __USE_GNU */ 117 }; 118 119 #endif /* __CONFIG_E500__ */ 120 121 #define FE_ALL_EXCEPT \ 122 (FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID) 123 124 /* PowerPC chips support all of the four defined rounding modes. We 125 use the bit pattern in the FPSCR as the values for the 126 appropriate macros. */ 127 enum 128 { 129 FE_TONEAREST = 0, 130 #define FE_TONEAREST FE_TONEAREST 131 FE_TOWARDZERO = 1, 132 #define FE_TOWARDZERO FE_TOWARDZERO 133 FE_UPWARD = 2, 134 #define FE_UPWARD FE_UPWARD 135 FE_DOWNWARD = 3 136 #define FE_DOWNWARD FE_DOWNWARD 137 }; 138 139 /* Type representing exception flags. */ 140 typedef unsigned int fexcept_t; 141 142 /* Type representing floating-point environment. We leave it as 'double' 143 for efficiency reasons (rather than writing it to a 32-bit integer). */ 144 typedef double fenv_t; 145 146 /* If the default argument is used we use this value. */ 147 extern const fenv_t __fe_dfl_env; 148 #define FE_DFL_ENV (&__fe_dfl_env) 149 150 #ifdef __USE_GNU 151 /* Floating-point environment where all exceptions are enabled. Note that 152 this is not sufficient to give you SIGFPE. */ 153 extern const fenv_t __fe_enabled_env; 154 # define FE_ENABLED_ENV (&__fe_enabled_env) 155 156 /* Floating-point environment with (processor-dependent) non-IEEE floating 157 point. */ 158 extern const fenv_t __fe_nonieee_env; 159 # define FE_NONIEEE_ENV (&__fe_nonieee_env) 160 161 /* Floating-point environment with all exceptions enabled. Note that 162 just evaluating this value will set the processor into 'FPU 163 exceptions imprecise recoverable' mode, which may cause a significant 164 performance penalty (but have no other visible effect). */ 165 extern const fenv_t *__fe_nomask_env (void); 166 # define FE_NOMASK_ENV (__fe_nomask_env ()) 167 #endif /* __USE_GNU */ 168