Lines Matching refs:VEC_SIZE
7 # if VEC_SIZE == 4
15 # elif VEC_SIZE == 8
23 # elif VEC_SIZE == 2
53 #elif VEC_SIZE == 8 && defined(__SSE__)
55 #elif VEC_SIZE == 16
73 #elif VEC_SIZE == 32
88 for ( i = 0; i < VEC_SIZE; ++i ) in _to_bool()
101 #if VEC_SIZE == FLOAT_SIZE
143 #elif VEC_SIZE == 8 && FLOAT_SIZE == 4 && defined(__3dNOW__)
145 #elif defined(FLOAT_SIZE) && VEC_SIZE > FLOAT_SIZE && defined(__AVX512F__) && \
146 (VEC_SIZE == 64 || defined(__AVX512VL__))
177 # if VEC_SIZE == 16
182 # elif VEC_SIZE == 32
188 # elif VEC_SIZE == 64
212 #elif VEC_SIZE == 16 && defined(__SSE2__)
218 #elif VEC_SIZE == 32 && defined(__AVX__)
226 #if VEC_SIZE == FLOAT_SIZE
239 #if VEC_SIZE == 16 && FLOAT_SIZE == 4 && defined(__SSE__)
254 #if VEC_SIZE == 8 && FLOAT_SIZE == 4 && defined(__3dNOW_A__)
271 #elif defined(FLOAT_SIZE) && VEC_SIZE == FLOAT_SIZE && defined(__AVX512F__)
308 (VEC_SIZE == 64 || defined(__AVX512VL__))
340 # if VEC_SIZE >= 32 && defined(__AVX512DQ__)
347 # if VEC_SIZE == 64 && defined(__AVX512DQ__)
365 # if VEC_SIZE == 64 && defined(__AVX512ER__)
376 # if VEC_SIZE == 16
392 vec_t t_ = B(shuf_f32x4_, _mask, x, x, VEC_SIZE == 32 ? 0b01 : 0b00011011, undef(), ~0); \
397 VEC_SIZE == 32 ? 0b01 : 0b00011011, undef(), ~0), \
401 # if VEC_SIZE >= 32
416 # if VEC_SIZE >= 32 && defined(__AVX512DQ__)
420 # if VEC_SIZE == 64
438 # if VEC_SIZE == 64 && defined(__AVX512ER__)
447 # if VEC_SIZE == 16
456 vec_t t_ = B(shuf_f64x2_, _mask, x, x, VEC_SIZE == 32 ? 0b01 : 0b00011011, undef(), ~0); \
461 VEC_SIZE == 32 ? 0b01 : 0b00011011, undef(), ~0), \
481 # if VEC_SIZE == 32 && defined(__AVX__)
505 # elif VEC_SIZE == 16
522 # elif VEC_SIZE == 4
528 # if VEC_SIZE == 32 && defined(__AVX__)
559 # elif VEC_SIZE == 16
572 # elif VEC_SIZE == 8
579 defined(__AVX512F__) && (VEC_SIZE == 64 || defined(__AVX512VL__))
620 # if VEC_SIZE == 64 && defined(__AVX512DQ__)
624 # if VEC_SIZE == 16
641 VEC_SIZE == 32 ? 0b01 : 0b00011011, (vsi_t)undef(), ~0), \
663 # if VEC_SIZE >= 32 && defined(__AVX512DQ__)
667 # if VEC_SIZE == 64
671 # if VEC_SIZE == 16
680 VEC_SIZE == 32 ? 0b01 : 0b00011011, (vdi_t)undef(), ~0), \
686 # if VEC_SIZE == 32
688 # elif VEC_SIZE == 64
715 defined(__AVX512BW__) && (VEC_SIZE == 64 || defined(__AVX512VL__))
728 # if VEC_SIZE == 16
757 # if VEC_SIZE == 16
803 #elif VEC_SIZE == 16 && defined(__SSE2__)
840 #elif VEC_SIZE == 32 && defined(__AVX2__)
939 #if VEC_SIZE == 16 && defined(__SSE3__)
956 #elif VEC_SIZE == 32 && defined(__AVX__)
993 #elif VEC_SIZE == 64
1011 #if VEC_SIZE == 16 && defined(__SSSE3__) && !defined(__AVX512VL__)
1037 #if VEC_SIZE == 16 && defined(__SSE4_1__) && !defined(__AVX512VL__)
1091 #if VEC_SIZE == 32 && defined(__AVX__) && !defined(__AVX512VL__)
1116 #if VEC_SIZE == FLOAT_SIZE
1129 # if VEC_SIZE == 16
1191 # elif VEC_SIZE == 32
1199 # elif VEC_SIZE == FLOAT_SIZE
1200 # if VEC_SIZE == 4
1202 # elif VEC_SIZE == 8
1208 #if VEC_SIZE >= 16
1213 # if HALF_SIZE < VEC_SIZE in low_half()
1230 # if QUARTER_SIZE < VEC_SIZE in low_quarter()
1247 # if EIGHTH_SIZE < VEC_SIZE in low_eighth()
1362 #elif ELEM_SIZE > 1 || VEC_SIZE <= 8 in simd_test()
1921 #if (defined(__XOP__) && VEC_SIZE == 16 && (INT_SIZE == 2 || INT_SIZE == 4)) || \ in simd_test()