1 /* SPDX-License-Identifier: MIT */
2 
3 /*
4  * xen/arch/riscv/include/asm/imsic.h
5  *
6  * RISC-V Incoming MSI Controller support
7  *
8  * (c) Microchip Technology Inc.
9  */
10 
11 #ifndef ASM_RISCV_IMSIC_H
12 #define ASM_RISCV_IMSIC_H
13 
14 #include <xen/spinlock.h>
15 #include <xen/stdbool.h>
16 #include <xen/types.h>
17 
18 #define IMSIC_MMIO_PAGE_SHIFT   12
19 #define IMSIC_MMIO_PAGE_SZ      (1UL << IMSIC_MMIO_PAGE_SHIFT)
20 
21 #define IMSIC_MIN_ID            63
22 #define IMSIC_MAX_ID            2047
23 
24 #define IMSIC_EIDELIVERY        0x70
25 
26 #define IMSIC_EITHRESHOLD       0x72
27 
28 #define IMSIC_EIP0              0x80
29 #define IMSIC_EIPx_BITS         32
30 
31 #define IMSIC_EIE0              0xC0
32 
33 struct imsic_msi {
34     paddr_t base_addr;
35     unsigned long offset;
36 };
37 
38 struct imsic_config {
39     /* Base address */
40     paddr_t base_addr;
41 
42     /* Bits representing Guest index, HART index, and Group index */
43     unsigned int guest_index_bits;
44     unsigned int hart_index_bits;
45     unsigned int group_index_bits;
46     unsigned int group_index_shift;
47 
48     /* IMSIC phandle */
49     unsigned int phandle;
50 
51     /* Number of parent irq */
52     unsigned int nr_parent_irqs;
53 
54     /* Number off interrupt identities */
55     unsigned int nr_ids;
56 
57     /* MSI */
58     const struct imsic_msi *msi;
59 
60     /* Lock to protect access to IMSIC's stuff */
61     spinlock_t lock;
62 };
63 
64 struct dt_device_node;
65 int imsic_init(const struct dt_device_node *node);
66 
67 const struct imsic_config *imsic_get_config(void);
68 
69 void imsic_irq_enable(unsigned int hwirq);
70 void imsic_irq_disable(unsigned int hwirq);
71 
72 void imsic_ids_local_delivery(bool enable);
73 
74 #endif /* ASM_RISCV_IMSIC_H */
75