1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (C) 2015 Regents of the University of California
4  */
5 
6 #ifndef ASM__RISCV__CSR_H
7 #define ASM__RISCV__CSR_H
8 
9 #include <asm/asm.h>
10 #include <xen/const.h>
11 #include <asm/riscv_encoding.h>
12 
13 #ifndef __ASSEMBLY__
14 
15 #define csr_read(csr)                                           \
16 ({                                                              \
17     register unsigned long __v;                                 \
18     __asm__ __volatile__ ( "csrr %0, " __ASM_STR(csr)           \
19                            : "=r" (__v)                         \
20                            : : "memory" );                      \
21     __v;                                                        \
22 })
23 
24 #define csr_write(csr, val)                                     \
25 ({                                                              \
26     unsigned long __v = (unsigned long)(val);                   \
27     __asm__ __volatile__ ( "csrw " __ASM_STR(csr) ", %0"        \
28                            : /* no outputs */                   \
29                            : "rK" (__v)                         \
30                            : "memory" );                        \
31 })
32 
33 #define csr_swap(csr, val)                                      \
34 ({                                                              \
35     unsigned long __v = (unsigned long)(val);                   \
36     __asm__ __volatile__ ( "csrrw %0, " __ASM_STR(csr) ", %1"   \
37                            : "=r" (__v)                         \
38                            : "rK" (__v)                         \
39                            : "memory" );                        \
40     __v;                                                        \
41 })
42 
43 #define csr_read_set(csr, val)                                  \
44 ({                                                              \
45     unsigned long __v = (unsigned long)(val);                   \
46     __asm__ __volatile__ ( "csrrs %0, " __ASM_STR(csr) ", %1"   \
47                            : "=r" (__v)                         \
48                            : "rK" (__v)                         \
49                            : "memory" );                        \
50     __v;                                                        \
51 })
52 
53 #define csr_set(csr, val)                                       \
54 ({                                                              \
55     unsigned long __v = (unsigned long)(val);                   \
56     __asm__ __volatile__ ( "csrs " __ASM_STR(csr) ", %0"        \
57                            : /* no outputs */                   \
58                            : "rK" (__v)                         \
59                            : "memory" );                        \
60 })
61 
62 #define csr_read_clear(csr, val)                                \
63 ({                                                              \
64     unsigned long __v = (unsigned long)(val);                   \
65     __asm__ __volatile__ ( "csrrc %0, " __ASM_STR(csr) ", %1"   \
66                            : "=r" (__v)                         \
67                            : "rK" (__v)                         \
68                            : "memory" );                        \
69     __v;                                                        \
70 })
71 
72 #define csr_clear(csr, val)                                     \
73 ({                                                              \
74     unsigned long __v = (unsigned long)(val);                   \
75     __asm__ __volatile__ ( "csrc " __ASM_STR(csr) ", %0"        \
76                            : /* no outputs */                   \
77                            : "rK" (__v)                         \
78                            : "memory" );                        \
79 })
80 
81 #endif /* __ASSEMBLY__ */
82 
83 #endif /* ASM__RISCV__CSR_H */
84