1 /*
2 * Based on linux arch/arm/include/asm/io.h
3 *
4 * Copyright (C) 1996-2000 Russell King
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Modifications:
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
19 * 05-Oct-2004 BJD Moved memory string functions to use void __iomem
20 */
21 #ifndef _ARM_ARM32_IO_H
22 #define _ARM_ARM32_IO_H
23
24 #include <xen/byteorder.h>
25
26 #include <asm/system.h>
27
__raw_writeb(u8 val,volatile void __iomem * addr)28 static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
29 {
30 asm volatile("strb %1, %0"
31 : "+Qo" (*(volatile u8 __force *)addr)
32 : "r" (val));
33 }
34
__raw_writew(u16 val,volatile void __iomem * addr)35 static inline void __raw_writew(u16 val, volatile void __iomem *addr)
36 {
37 asm volatile("strh %1, %0"
38 : "+Q" (*(volatile u16 __force *)addr)
39 : "r" (val));
40 }
41
__raw_writel(u32 val,volatile void __iomem * addr)42 static inline void __raw_writel(u32 val, volatile void __iomem *addr)
43 {
44 asm volatile("str %1, %0"
45 : "+Qo" (*(volatile u32 __force *)addr)
46 : "r" (val));
47 }
48
__raw_readb(const volatile void __iomem * addr)49 static inline u8 __raw_readb(const volatile void __iomem *addr)
50 {
51 u8 val;
52 asm volatile("ldrb %1, %0"
53 : "+Qo" (*(volatile u8 __force *)addr),
54 "=r" (val));
55 return val;
56 }
57
__raw_readw(const volatile void __iomem * addr)58 static inline u16 __raw_readw(const volatile void __iomem *addr)
59 {
60 u16 val;
61 asm volatile("ldrh %1, %0"
62 : "+Q" (*(volatile u16 __force *)addr),
63 "=r" (val));
64 return val;
65 }
66
__raw_readl(const volatile void __iomem * addr)67 static inline u32 __raw_readl(const volatile void __iomem *addr)
68 {
69 u32 val;
70 asm volatile("ldr %1, %0"
71 : "+Qo" (*(volatile u32 __force *)addr),
72 "=r" (val));
73 return val;
74 }
75
76 #define __iormb() rmb()
77 #define __iowmb() wmb()
78
79 #define readb_relaxed(c) ({ u8 __r = __raw_readb(c); __r; })
80 #define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \
81 __raw_readw(c)); __r; })
82 #define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \
83 __raw_readl(c)); __r; })
84 /*
85 * ldrd instructions are not decoded by Arm when running as a guest to access
86 * emulated MMIO region. Thus, readq_relaxed_non_atomic() invokes readl_relaxed()
87 * twice to read the lower and upper 32 bits.
88 */
readq_relaxed_non_atomic(const volatile void __iomem * addr)89 static inline u64 readq_relaxed_non_atomic(const volatile void __iomem *addr)
90 {
91 u64 val = (((u64)readl_relaxed(addr + 4)) << 32) | readl_relaxed(addr);
92 return val;
93 }
94
95 #define writeb_relaxed(v,c) __raw_writeb(v,c)
96 #define writew_relaxed(v,c) __raw_writew((__force u16) cpu_to_le16(v),c)
97 #define writel_relaxed(v,c) __raw_writel((__force u32) cpu_to_le32(v),c)
98 /*
99 * strd instructions are not decoded by Arm when running as a guest to access
100 * emulated MMIO region. Thus, writeq_relaxed_non_atomic() invokes writel_relaxed()
101 * twice to write the lower and upper 32 bits.
102 */
writeq_relaxed_non_atomic(u64 val,volatile void __iomem * addr)103 static inline void writeq_relaxed_non_atomic(u64 val, volatile void __iomem *addr)
104 {
105 writel_relaxed((u32)val, addr);
106 writel_relaxed((u32)(val >> 32), addr + 4);
107 }
108
109 #define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
110 #define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
111 #define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
112
113 #define writeb(v,c) ({ __iowmb(); writeb_relaxed(v,c); })
114 #define writew(v,c) ({ __iowmb(); writew_relaxed(v,c); })
115 #define writel(v,c) ({ __iowmb(); writel_relaxed(v,c); })
116
117 #endif /* _ARM_ARM32_IO_H */
118