1 #ifndef __ASM_ARM_ARM64_PROCESSOR_H
2 #define __ASM_ARM_ARM64_PROCESSOR_H
3 
4 #ifndef __ASSEMBLY__
5 
6 /* Anonymous union includes both 32- and 64-bit names (e.g., r0/x0). */
7 
8 #define __DECL_REG(n64, n32) union {            \
9     uint64_t n64;                               \
10     uint32_t n32;                               \
11 }
12 
13 /* On stack VCPU state */
14 struct cpu_user_regs
15 {
16     /*
17      * The mapping AArch64 <-> AArch32 is based on D1.20.1 in ARM DDI
18      * 0487A.d.
19      *
20      *         AArch64       AArch32
21      */
22     __DECL_REG(x0,           r0/*_usr*/);
23     __DECL_REG(x1,           r1/*_usr*/);
24     __DECL_REG(x2,           r2/*_usr*/);
25     __DECL_REG(x3,           r3/*_usr*/);
26     __DECL_REG(x4,           r4/*_usr*/);
27     __DECL_REG(x5,           r5/*_usr*/);
28     __DECL_REG(x6,           r6/*_usr*/);
29     __DECL_REG(x7,           r7/*_usr*/);
30     __DECL_REG(x8,           r8/*_usr*/);
31     __DECL_REG(x9,           r9/*_usr*/);
32     __DECL_REG(x10,          r10/*_usr*/);
33     __DECL_REG(x11 ,         r11/*_usr*/);
34     __DECL_REG(x12,          r12/*_usr*/);
35 
36     __DECL_REG(x13,          /* r13_usr */ sp_usr);
37     __DECL_REG(x14,          /* r14_usr */ lr_usr);
38 
39     __DECL_REG(x15,          /* r13_hyp */ __unused_sp_hyp);
40 
41     __DECL_REG(x16,          /* r14_irq */ lr_irq);
42     __DECL_REG(x17,          /* r13_irq */ sp_irq);
43 
44     __DECL_REG(x18,          /* r14_svc */ lr_svc);
45     __DECL_REG(x19,          /* r13_svc */ sp_svc);
46 
47     __DECL_REG(x20,          /* r14_abt */ lr_abt);
48     __DECL_REG(x21,          /* r13_abt */ sp_abt);
49 
50     __DECL_REG(x22,          /* r14_und */ lr_und);
51     __DECL_REG(x23,          /* r13_und */ sp_und);
52 
53     __DECL_REG(x24,          r8_fiq);
54     __DECL_REG(x25,          r9_fiq);
55     __DECL_REG(x26,          r10_fiq);
56     __DECL_REG(x27,          r11_fiq);
57     __DECL_REG(x28,          r12_fiq);
58     __DECL_REG(/* x29 */ fp, /* r13_fiq */ sp_fiq);
59 
60     __DECL_REG(/* x30 */ lr, /* r14_fiq */ lr_fiq);
61 
62     register_t sp; /* Valid for hypervisor frames */
63 
64     /* Return address and mode */
65     __DECL_REG(pc,           pc32);             /* ELR_EL2 */
66     uint64_t cpsr;                              /* SPSR_EL2 */
67     uint64_t hsr;                               /* ESR_EL2 */
68 
69     /* The kernel frame should be 16-byte aligned. */
70     uint64_t pad0;
71 
72     /* Outer guest frame only from here on... */
73 
74     union {
75         uint64_t spsr_el1;       /* AArch64 */
76         uint32_t spsr_svc;       /* AArch32 */
77     };
78 
79     /* AArch32 guests only */
80     uint32_t spsr_fiq, spsr_irq, spsr_und, spsr_abt;
81 
82     /* AArch64 guests only */
83     uint64_t sp_el0;
84     uint64_t sp_el1, elr_el1;
85 };
86 
87 #undef __DECL_REG
88 
89 #endif /* __ASSEMBLY__ */
90 
91 #endif /* __ASM_ARM_ARM64_PROCESSOR_H */
92 /*
93  * Local variables:
94  * mode: C
95  * c-file-style: "BSD"
96  * c-basic-offset: 4
97  * indent-tabs-mode: nil
98  * End:
99  */
100