1 #ifndef _XEN_X86_MCE_H 2 #define _XEN_X86_MCE_H 3 4 #include <xen/spinlock.h> 5 #include <xen/types.h> 6 7 /* 8 * Emulate 2 banks for guest 9 * Bank0: reserved for 'bank0 quirk' occur at some very old processors: 10 * 1). Intel cpu whose family-model value < 06-1A; 11 * 2). AMD K7 12 * Bank1: used to transfer error info to guest 13 */ 14 #define GUEST_MC_BANK_NUM 2 15 16 /* Filter MSCOD model specific error code to guest */ 17 #define MCi_STATUS_MSCOD_MASK (~(0xffffULL << 16)) 18 19 /* No mci_ctl since it stick all 1's */ 20 struct vmce_bank { 21 uint64_t mci_status; 22 uint64_t mci_addr; 23 uint64_t mci_misc; 24 uint64_t mci_ctl2; 25 }; 26 27 /* No mcg_ctl since it not expose to guest */ 28 struct vmce { 29 uint64_t mcg_cap; 30 uint64_t mcg_status; 31 uint64_t mcg_ext_ctl; 32 spinlock_t lock; 33 struct vmce_bank bank[GUEST_MC_BANK_NUM]; 34 }; 35 36 struct domain; 37 struct vcpu; 38 39 /* Guest vMCE MSRs virtualization */ 40 extern void vmce_init_vcpu(struct vcpu *v); 41 extern int vmce_restore_vcpu(struct vcpu *v, const struct hvm_vmce_vcpu *ctxt); 42 extern int vmce_wrmsr(uint32_t msr, uint64_t val); 43 extern int vmce_rdmsr(uint32_t msr, uint64_t *val); 44 extern int vmce_enable_mca_cap(struct domain *d, uint64_t cap); 45 46 DECLARE_PER_CPU(unsigned int, nr_mce_banks); 47 48 #endif 49