Lines Matching refs:root
64 struct clock_control_bl70x_root_config root; member
408 clock_control_bl70x_select_DLL(data->root.dll_select); in clock_control_bl70x_init_root_as_dll()
457 ret = clock_control_bl70x_set_root_clock_dividers(data->root.divider - 1, in clock_control_bl70x_update_root()
463 if (data->root.source == bl70x_clkid_clk_dll) { in clock_control_bl70x_update_root()
465 } else if (data->root.source == bl70x_clkid_clk_crystal) { in clock_control_bl70x_update_root()
573 if (data->root.source == bl70x_clkid_clk_rc32m) { in clock_control_bl70x_on()
577 data->root.source = bl70x_clkid_clk_rc32m; in clock_control_bl70x_on()
581 if (data->root.source == bl70x_clkid_clk_crystal) { in clock_control_bl70x_on()
584 oldroot = data->root.source; in clock_control_bl70x_on()
585 data->root.source = bl70x_clkid_clk_crystal; in clock_control_bl70x_on()
588 data->root.source = oldroot; in clock_control_bl70x_on()
592 if (data->root.source == bl70x_clkid_clk_dll) { in clock_control_bl70x_on()
595 oldroot = data->root.source; in clock_control_bl70x_on()
596 data->root.source = bl70x_clkid_clk_dll; in clock_control_bl70x_on()
599 data->root.source = oldroot; in clock_control_bl70x_on()
717 .root = {
718 #if CLK_SRC_IS(root, dll_144)
720 .dll_select = DT_CLOCKS_CELL(DT_INST_CLOCKS_CTLR_BY_NAME(0, root), select),
721 #elif CLK_SRC_IS(root, crystal)
726 .divider = DT_PROP(DT_INST_CLOCKS_CTLR_BY_NAME(0, root), divider),
742 BUILD_ASSERT(CLK_SRC_IS(dll_144, crystal) || CLK_SRC_IS(root, crystal)
747 BUILD_ASSERT(CLK_SRC_IS(root, dll_144) ?