Lines Matching refs:cfg_addr
177 mm_reg_t cfg_addr; member
222 sys_write32(bdf << PCIE_ECAM_BDF_SHIFT, data->cfg_addr + PCIE_EXT_CFG_INDEX); in pcie_brcmstb_map_bus()
223 return data->cfg_addr + PCIE_EXT_CFG_DATA + reg * sizeof(uint32_t); in pcie_brcmstb_map_bus()
418 pcie_brcmstb_mdio_write(data->cfg_addr, MDIO_PORT0, SET_ADDR_OFFSET, 0x1600); in pcie_brcmstb_munge_pll()
421 pcie_brcmstb_mdio_write(data->cfg_addr, MDIO_PORT0, regs[i], vals[i]); in pcie_brcmstb_munge_pll()
433 sys_write32(lower_32_bits(pcie_addr), data->cfg_addr + PCIE_MEM_WIN0_LO(win)); in pcie_brcmstb_set_outbound_win()
434 sys_write32(upper_32_bits(pcie_addr), data->cfg_addr + PCIE_MEM_WIN0_HI(win)); in pcie_brcmstb_set_outbound_win()
439 tmp = sys_read32(data->cfg_addr + PCIE_MEM_WIN0_BASE_LIMIT(win)); in pcie_brcmstb_set_outbound_win()
448 sys_write32(tmp, data->cfg_addr + PCIE_MEM_WIN0_BASE_LIMIT(win)); in pcie_brcmstb_set_outbound_win()
451 tmp = sys_read32(data->cfg_addr + PCIE_MEM_WIN0_BASE_HI(win)); in pcie_brcmstb_set_outbound_win()
454 sys_write32(tmp, data->cfg_addr + PCIE_MEM_WIN0_BASE_HI(win)); in pcie_brcmstb_set_outbound_win()
457 tmp = sys_read32(data->cfg_addr + PCIE_MEM_WIN0_LIMIT_HI(win)); in pcie_brcmstb_set_outbound_win()
460 sys_write32(tmp, data->cfg_addr + PCIE_MEM_WIN0_LIMIT_HI(win)); in pcie_brcmstb_set_outbound_win()
472 tmp = sys_read32(data->cfg_addr + PCIE_RC_PL_PHY_CTL_15); in pcie_brcmstb_setup()
475 sys_write32(tmp, data->cfg_addr + PCIE_RC_PL_PHY_CTL_15); in pcie_brcmstb_setup()
477 tmp = sys_read32(data->cfg_addr + PCIE_MISC_MISC_CTRL); in pcie_brcmstb_setup()
482 sys_write32(tmp, data->cfg_addr + PCIE_MISC_MISC_CTRL); in pcie_brcmstb_setup()
491 sys_write32(tmp, data->cfg_addr + PCIE_MISC_RC_BAR2_CONFIG_LO); in pcie_brcmstb_setup()
492 sys_write32(upper_32_bits(rc_bar2_offset), data->cfg_addr + PCIE_MISC_RC_BAR2_CONFIG_HI); in pcie_brcmstb_setup()
494 tmp = sys_read32(data->cfg_addr + PCIE_MISC_UBUS_BAR2_CONFIG_REMAP); in pcie_brcmstb_setup()
496 sys_write32(tmp, data->cfg_addr + PCIE_MISC_UBUS_BAR2_CONFIG_REMAP); in pcie_brcmstb_setup()
499 tmp = sys_read32(data->cfg_addr + PCIE_MISC_MISC_CTRL); in pcie_brcmstb_setup()
503 sys_write32(tmp, data->cfg_addr + PCIE_MISC_MISC_CTRL); in pcie_brcmstb_setup()
505 tmp = sys_read32(data->cfg_addr + PCIE_MISC_UBUS_CTRL); in pcie_brcmstb_setup()
508 sys_write32(tmp, data->cfg_addr + PCIE_MISC_UBUS_CTRL); in pcie_brcmstb_setup()
509 sys_write32(0xffffffff, data->cfg_addr + PCIE_MISC_AXI_READ_ERROR_DATA); in pcie_brcmstb_setup()
512 sys_write32(BCM2712_UBUS_TIMEOUT_TICKS, data->cfg_addr + PCIE_MISC_UBUS_TIMEOUT); in pcie_brcmstb_setup()
514 data->cfg_addr + PCIE_MISC_RC_CONFIG_RETRY_TIMEOUT); in pcie_brcmstb_setup()
516 tmp = sys_read32(data->cfg_addr + PCIE_MISC_RC_BAR1_CONFIG_LO); in pcie_brcmstb_setup()
518 sys_write32(tmp, data->cfg_addr + PCIE_MISC_RC_BAR1_CONFIG_LO); in pcie_brcmstb_setup()
520 tmp = sys_read32(data->cfg_addr + PCIE_MISC_RC_BAR3_CONFIG_LO); in pcie_brcmstb_setup()
522 sys_write32(tmp, data->cfg_addr + PCIE_MISC_RC_BAR3_CONFIG_LO); in pcie_brcmstb_setup()
525 tmp16 = sys_read16(data->cfg_addr + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); in pcie_brcmstb_setup()
526 tmp = sys_read32(data->cfg_addr + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); in pcie_brcmstb_setup()
529 sys_write32(tmp, data->cfg_addr + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCAP); in pcie_brcmstb_setup()
532 sys_write16(tmp16, data->cfg_addr + BRCM_PCIE_CAP_REGS + PCI_EXP_LNKCTL2); in pcie_brcmstb_setup()
534 tmp = sys_read32(data->cfg_addr + PCIE_RC_CFG_PRIV1_ID_VAL3); in pcie_brcmstb_setup()
537 sys_write32(tmp, data->cfg_addr + PCIE_RC_CFG_PRIV1_ID_VAL3); in pcie_brcmstb_setup()
539 tmp = sys_read32(data->cfg_addr + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); in pcie_brcmstb_setup()
543 sys_write32(tmp, data->cfg_addr + PCIE_RC_CFG_VENDOR_VENDOR_SPECIFIC_REG1); in pcie_brcmstb_setup()
565 data->cfg_phys_addr = config->common->cfg_addr; in pcie_brcmstb_init()
568 device_map(&data->cfg_addr, data->cfg_phys_addr, data->cfg_size, K_MEM_CACHE_NONE); in pcie_brcmstb_init()
574 tmp = sys_read32(data->cfg_addr + PCIE_MISC_PCIE_CTRL); in pcie_brcmstb_init()
576 sys_write32(tmp, data->cfg_addr + PCIE_MISC_PCIE_CTRL); in pcie_brcmstb_init()
581 tmp = sys_read32(data->cfg_addr + PCI_COMMAND); in pcie_brcmstb_init()
583 sys_write32(tmp, data->cfg_addr + PCI_COMMAND); in pcie_brcmstb_init()
594 sys_write32(config->regs[i].addr, data->cfg_addr + PCIE_EXT_CFG_DATA + in pcie_brcmstb_init()
599 tmp = sys_read32(data->cfg_addr + PCIE_EXT_CFG_DATA + PCI_COMMAND); in pcie_brcmstb_init()
601 sys_write32(tmp, data->cfg_addr + PCIE_EXT_CFG_DATA + PCI_COMMAND); in pcie_brcmstb_init()
611 .cfg_addr = DT_INST_REG_ADDR(n), \