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Searched refs:index (Results 1 – 18 of 18) sorted by relevance

/arch/riscv/core/
A Dpmp.c67 for (index = pmp_start; index < pmp_end; index++) { in print_pmp_entries()
72 start = (index == 0) ? 0 : (pmp_addr[index - 1] << 2); in print_pmp_entries()
97 index, pmp_addr[index], pmp_n_cfg[index], in print_pmp_entries()
172 (index != 0 && pmp_addr[index - 1] == PMP_ADDR(start)))) { in set_pmp_entry()
176 index += 1; in set_pmp_entry()
180 index += 1; in set_pmp_entry()
187 index += 1; in set_pmp_entry()
194 index += 1; in set_pmp_entry()
197 index += 1; in set_pmp_entry()
293 for (index = end; index % PMPCFG_STRIDE != 0; index++) { in write_pmp_entries()
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/arch/x86/core/
A Dmultiboot.c21 static inline void clear_memmap(int index) in clear_memmap() argument
23 while (index < CONFIG_X86_MEMMAP_ENTRIES) { in clear_memmap()
24 x86_memmap[index].type = X86_MEMMAP_ENTRY_UNUSED; in clear_memmap()
25 ++index; in clear_memmap()
65 int index = 0; in z_multiboot_init() local
82 (index < CONFIG_X86_MEMMAP_ENTRIES)) { in z_multiboot_init()
85 x86_memmap[index].base = mmap->base; in z_multiboot_init()
86 x86_memmap[index].length = mmap->length; in z_multiboot_init()
106 x86_memmap[index].type = type; in z_multiboot_init()
107 ++index; in z_multiboot_init()
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A Dx86_mmu.c1012 int index; in page_map_set() local
1015 index = get_index(virt, level); in page_map_set()
1016 entryp = &table[index]; in page_map_set()
/arch/arc/core/mpu/
A Darc_mpu_v6_internal.h75 static inline void _region_init(uint32_t index, uint32_t region_addr, in _region_init() argument
78 uint32_t bank = index / ARC_FEATURE_MPU_BANK_SIZE; in _region_init()
80 index = (index % ARC_FEATURE_MPU_BANK_SIZE) * 2U; in _region_init()
108 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr); in _region_init()
109 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr); in _region_init()
151 uint32_t index = (r_index % ARC_FEATURE_MPU_BANK_SIZE) * 2U; in _is_enabled_region() local
154 return ((z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDB0 + index) in _is_enabled_region()
167 uint32_t index = (r_index % ARC_FEATURE_MPU_BANK_SIZE) * 2U; in _is_in_region() local
171 r_size_lshift = z_arc_v2_aux_reg_read(_ARC_V2_MPU_RDP0 + index) & AUX_MPU_RDP_SIZE_MASK; in _is_in_region()
189 uint32_t index = (r_index % ARC_FEATURE_MPU_BANK_SIZE) * 2U; in _is_user_accessible_region() local
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A Darc_mpu_v4_internal.h55 uint8_t index; member
254 int index = _mpu_probe(start); in _get_region_index() local
256 if (index > 0 && index == _mpu_probe(start + size - 1)) { in _get_region_index()
257 return index; in _get_region_index()
399 dyn_reg_info[i].index, in _mpu_reset_dynamic_regions()
634 if (index >= get_num_regions()) { in arc_core_mpu_region()
711 int index; in arc_core_mpu_remove_mem_domain() local
725 index = _get_region_index(pparts->start, in arc_core_mpu_remove_mem_domain()
727 if (index > 0) { in arc_core_mpu_remove_mem_domain()
729 _region_set_attr(index, in arc_core_mpu_remove_mem_domain()
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A Darc_mpu_v2_internal.h51 static inline void _region_init(uint32_t index, uint32_t region_addr, uint32_t size, in _region_init() argument
54 index = index * 2U; in _region_init()
74 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDP0 + index, region_attr); in _region_init()
75 z_arc_v2_aux_reg_write(_ARC_V2_MPU_RDB0 + index, region_addr); in _region_init()
A Darc_mpu_common_internal.h111 int arc_core_mpu_region(uint32_t index, uint32_t base, uint32_t size, uint32_t region_attr) in arc_core_mpu_region() argument
113 if (index >= get_num_regions()) { in arc_core_mpu_region()
119 _region_init(index, base, size, region_attr); in arc_core_mpu_region()
/arch/arm/core/mpu/
A Dnxp_mpu.c93 if (index == 0U) { in region_init()
103 index, region_base, (uint32_t)SYSMPU->WORD[index][0]); in region_init()
107 index, region_end, (uint32_t)SYSMPU->WORD[index][1]); in region_init()
112 SYSMPU->RGDAAC[index] = region_attr; in region_init()
115 SYSMPU->WORD[index][0] = region_base; in region_init()
116 SYSMPU->WORD[index][1] = region_end; in region_init()
143 region_init(index, region_conf); in region_allocate_and_init()
145 return index; in region_allocate_and_init()
272 if (region_allocate_and_init(index, in mpu_sram_partitioning()
278 index++; in mpu_sram_partitioning()
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A Darm_mpu_v8_internal.h24 int index; member
166 index, in region_init()
256 mpu_set_rnr(index); in mpu_region_get_base()
262 mpu_set_rnr(index); in mpu_region_set_base()
269 mpu_set_rnr(index); in mpu_region_get_last_addr()
275 mpu_set_rnr(index); in mpu_region_set_limit()
283 mpu_set_rnr(index); in mpu_region_get_access_attr()
297 mpu_set_rnr(index); in mpu_region_get_conf()
361 - mpu_region_get_base(index); in mpu_region_get_size()
372 mpu_set_rnr(index); in is_enabled_region()
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A Darm_mpu_v7_internal.h29 static void region_init(const uint32_t index, in region_init() argument
33 set_region_number(index); in region_init()
48 | MPU_RBAR_VALID_Msk | index; in region_init()
51 index, region_conf->base, region_conf->attr.rasr); in region_init()
205 static int mpu_configure_region(const uint8_t index,
A Darm_mpu.c81 static int region_allocate_and_init(const uint8_t index, in region_allocate_and_init() argument
85 if (index > (get_num_regions() - 1U)) { in region_allocate_and_init()
88 LOG_ERR("Failed to allocate new MPU region %u\n", index); in region_allocate_and_init()
92 LOG_DBG("Program MPU region at index 0x%x", index); in region_allocate_and_init()
95 region_init(index, region_conf); in region_allocate_and_init()
97 return index; in region_allocate_and_init()
179 static int mpu_configure_region(const uint8_t index, in mpu_configure_region() argument
184 LOG_DBG("Configure MPU region at index 0x%x", index); in mpu_configure_region()
195 return region_allocate_and_init(index, in mpu_configure_region()
/arch/arm/core/mpu/cortex_a_r/
A Darm_mpu_internal.h56 static inline void set_region_number(uint32_t index) in set_region_number() argument
58 __asm__ volatile("mcr p15, 0, %0, c6, c2, 0" :: "r" (index) :); in set_region_number()
61 static inline uint32_t mpu_region_get_base(uint32_t index) in mpu_region_get_base() argument
63 set_region_number(index); in mpu_region_get_base()
95 static inline int is_enabled_region(uint32_t index) in is_enabled_region() argument
97 set_region_number(index); in is_enabled_region()
150 static inline uint32_t mpu_region_get_size(uint32_t index) in mpu_region_get_size() argument
152 set_region_number(index); in mpu_region_get_size()
/arch/arm/core/mpu/cortex_m/
A Darm_mpu_internal.h20 static inline void set_region_number(uint32_t index) in set_region_number() argument
22 MPU->RNR = index; in set_region_number()
25 static inline uint32_t mpu_region_get_base(uint32_t index) in mpu_region_get_base() argument
27 MPU->RNR = index; in mpu_region_get_base()
46 static inline int is_enabled_region(uint32_t index) in is_enabled_region() argument
53 MPU->RNR = index; in is_enabled_region()
121 static inline uint32_t mpu_region_get_size(uint32_t index) in mpu_region_get_size() argument
123 MPU->RNR = index; in mpu_region_get_size()
/arch/mips/core/
A Dirq_manage.c72 int index; in z_mips_enter_irq() local
79 index = find_lsb_set(ipending) - 1; in z_mips_enter_irq()
80 ipending &= ~BIT(index); in z_mips_enter_irq()
82 ite = &_sw_isr_table[index]; in z_mips_enter_irq()
/arch/arm64/core/
A Dmmu.c875 unsigned int index; in setup_page_tables() local
881 for (index = 0U; index < CONFIG_MAX_XLAT_TABLES; index++) { in setup_page_tables()
882 MMU_DEBUG("%d: %p\n", index, xlat_tables + index * Ln_XLAT_NUM_ENTRIES); in setup_page_tables()
885 for (index = 0U; index < mmu_config.num_regions; index++) { in setup_page_tables()
886 region = &mmu_config.mmu_regions[index]; in setup_page_tables()
897 for (index = 0U; index < ARRAY_SIZE(mmu_zephyr_ranges); index++) { in setup_page_tables()
898 range = &mmu_zephyr_ranges[index]; in setup_page_tables()
906 for (index = 0U; index < mmu_config.num_regions; index++) { in setup_page_tables()
913 for (index = 0U; index < ARRAY_SIZE(mmu_zephyr_ranges); index++) { in setup_page_tables()
916 range = &mmu_zephyr_ranges[index]; in setup_page_tables()
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/arch/x86/
A Dgen_mmu.py238 index = self.entry_index(virt_addr)
240 return (self.entries[index] & FLAG_P) != 0
247 index = self.entry_index(virt_addr)
249 return self.entries[index] & self.addr_mask
258 index = self.entry_index(virt_addr)
264 self.entries[index] = ((phys_addr & self.addr_mask) |
271 index = self.entry_index(virt_addr)
277 self.entries[index] = ((self.entries[index] & self.addr_mask) |
/arch/arm64/core/cortex_r/
A Darm_mpu.c178 static ALWAYS_INLINE void region_init(const uint32_t index, in region_init() argument
190 mpu_set_region(index, rbar, rlar); in region_init()
377 sys_dyn_regions[cpuid][i].index = -1; in dynamic_regions_init()
404 tmp_info->index = i; in dynamic_areas_init()
465 dst[i].index = -1; in dup_dynamic_regions()
614 int region_idx = dyn_regions[i].index; in flush_dynamic_regions_to_mpu()
/arch/riscv/
A DKconfig.isa208 addresses that index into arrays of basic types (halfword, word,
210 shifted index is added to a base address.

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