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Searched refs:lr (Results 1 – 25 of 39) sorted by relevance

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/arch/arc/core/dsp/
A Dswap_dsp_macros.h16 lr r13, [_ARC_V2_DSP_CTRL]
18 lr r13, [_ARC_V2_ACC0_GLO]
20 lr r13, [_ARC_V2_ACC0_GHI]
23 lr r13, [_ARC_V2_DSP_BFLY0]
42 lr r13, [_ARC_V2_AGU_AP0]
44 lr r13, [_ARC_V2_AGU_AP1]
46 lr r13, [_ARC_V2_AGU_AP2]
48 lr r13, [_ARC_V2_AGU_AP3]
50 lr r13, [_ARC_V2_AGU_OS0]
52 lr r13, [_ARC_V2_AGU_OS1]
[all …]
/arch/arm/core/cortex_a_r/
A Dcpu_idle.S27 push {r0, lr}
48 pop {r0, lr}
55 push {r0, lr}
57 pop {r0, lr}
70 bx lr
77 push {r0, lr}
79 pop {r0, lr}
99 bx lr
A Dswitch.S41 stm r2, {r4-r11, sp, lr}
74 ldm r2, {r4-r11, sp, lr}
78 push {r0, lr}
80 pop {r0, lr}
84 push {lr}
86 pop {lr}
89 bx lr
108 ldreq r1, [lr, #-4]
112 ldr r1, [lr, #-2]
A Dexc.S53 stmfd sp, {r0-r3, r12, lr}^
121 subeq lr, #4 /* ARM (!T_BIT) */
122 subne lr, #2 /* Thumb (T_BIT) */
130 stmfd sp, {r0-r3, r12, lr}^
194 sub lr, #4
220 sub lr, #8
259 pop {r0-r3, r12, lr}
277 subeq lr, #4 /* ARM (!T_BIT) */
278 subne lr, #2 /* Thumb (T_BIT) */
296 sub lr, #4
[all …]
A Dswap_helper.S48 push {r0, lr}
50 pop {r0, lr}
175 push {r0, lr}
177 pop {r0, lr}
182 push {r0, lr}
184 pop {r0, lr}
190 bx lr
279 push {lr}
297 ldreq r1, [lr, #-4]
301 ldr r1, [lr, #-2]
[all …]
A Disr_wrapper.S84 sub lr, lr, #4
87 push {r0-r3, r12, lr}
136 push {lr}
246 sub lr, #4
A Dexc_exit.S172 pop {lr}
188 pop {r0-r3, r12, lr}
254 pop {r0-r3, r12, lr}
271 ldmia sp, {r0-r3, r12, lr}^
A D__aeabi_read_tp.S18 bx lr
/arch/riscv/core/
A Disr.S164 lr t0, ___cpu_t_current_OFFSET(s0)
165 lr tp, _thread_offset_to_tls(t0)
174 lr gp, ___cpu_t_current_OFFSET(s0)
310 lr t0, ___cpu_t_current_OFFSET(s0)
378 lr a0, ___cpu_t_current_OFFSET(s0)
526 lr a0, ___cpu_t_current_OFFSET(s0)
661 lr a0, 0(t0)
664 lr t1, RV_REGSIZE(t0)
689 lr sp, 0(sp)
711 lr a1, 0(sp)
[all …]
A Dswitch.S50 lr sp, _thread_offset_to_sp(a0)
54 lr tp, _thread_offset_to_tls(a0)
91 DO_CALLEE_SAVED(lr, a0)
A Dreset.S105 lr t0, 0(t0)
110 lr sp, 0(t0)
/arch/arm/core/cortex_m/
A Dswap_helper.S59 push {r0, lr}
63 mov lr, r1
65 pop {r0, lr}
217 push {r2,lr}
221 mov lr, r3
297 pop {r2,lr}
339 mov lr, r1
348 bx lr
366 mov r1, lr
430 mov lr, r3
[all …]
A Dpm_s2ram.S61 push {r1-r5, lr}
65 push {r4-r12, lr}
78 mov lr, r6; \
88 pop {r4-r12, lr}
208 bx lr
219 push {r0, lr}
244 bx lr
A Dcoredump.c22 uint32_t lr; member
72 arch_blk.r.lr = esf->basic.lr; in arch_coredump_info_dump()
A D__aeabi_read_tp.S25 bx lr
A Dfault_s.S82 push {r0, lr}
101 mov r2, lr /* EXC_RETURN */
/arch/arc/core/
A Dfast_irq.S55 lr r2, [_ARC_V2_SEC_STAT]
60 lr r2, [_ARC_V2_STATUS32]
73 lr r24, [_ARC_V2_LP_START]
74 lr r25, [_ARC_V2_LP_END]
94 lr r1, [_ARC_V2_STATUS32]
114 lr ilink, [_ARC_V2_STATUS32]
117 lr sp, [_ARC_V2_USER_SP]
205 lr r0, [_ARC_V2_AUX_IRQ_ACT]
208 lr r0, [_ARC_V2_STATUS32]
216 lr r0, [_ARC_V2_STATUS32]
[all …]
A Dreset.S76 lr r0, [_ARC_V2_STATUS32]
81 lr r0, [_ARC_V2_STATUS32]
87 lr r0, [_ARC_V2_STATUS32]
93 lr r0, [_ARC_V2_I_CACHE_BUILD]
106 lr r3, [_ARC_V2_D_CACHE_BUILD]
136 lr r3, [_ARC_V2_MPU_BUILD]
156 lr r0, [_ARC_HW_PF_BUILD]
158 lr r1, [_ARC_HW_PF_CTRL]
A Disr_wrapper.S214 lr r0, [_ARC_V2_AUX_IRQ_ACT]
222 lr r0, [_ARC_V2_STATUS32_P0]
290 lr r0, [_ARC_V2_ICAUSE]
292 lr r3, [_ARC_V2_AUX_IRQ_HINT]
/arch/arm64/core/
A Dcpu_idle.S20 str lr, [sp, #-16]!
22 ldr lr, [sp], #16
34 stp x0, lr, [sp, #-16]!
36 ldp x0, lr, [sp], #16
A Dswitch.S53 stp x4, lr, [x1, #_thread_offset_to_callee_saved_sp_elx_lr]
115 ldp x4, lr, [x0, #_thread_offset_to_callee_saved_sp_elx_lr]
126 str lr, [sp, #-16]!
128 ldr lr, [sp], #16
132 str lr, [sp, #-16]!
134 ldr lr, [sp], #16
A Dfatal.c200 EXCEPTION_DUMP("x18: 0x%016llx lr: 0x%016llx", esf->x18, esf->lr); in esf_dump()
262 uint64_t lr; in walk_stackframe() local
273 lr = fp[1]; in walk_stackframe()
274 if (!is_valid_jump_address(&lr)) { in walk_stackframe()
277 if (!cb(cookie, lr, fp)) { in walk_stackframe()
295 static bool print_trace_address(void *arg, unsigned long lr, void *fp) in print_trace_address() argument
300 const char *name = symtab_find_symbol_name(lr, &offset); in print_trace_address()
303 (*i)++, (uint64_t)fp, lr, name, offset); in print_trace_address()
306 (*i)++, (uint64_t)fp, lr); in print_trace_address()
A Dcoredump.c40 uint64_t lr; member
93 arch_blk.r.lr = esf->lr; in arch_coredump_info_dump()
/arch/arc/include/
A Dswap_macros.h48 lr r13, [_ARC_V2_SEC_U_SP]
50 lr r13, [_ARC_V2_SEC_K_SP]
53 lr r13, [_ARC_V2_USER_SP]
55 lr r13, [_ARC_V2_KERNEL_SP]
59 lr r13, [_ARC_V2_USER_SP]
75 lr r13, [_ARC_V2_FPU_STATUS]
77 lr r13, [_ARC_V2_FPU_CTRL]
81 lr r13, [_ARC_V2_FPU_DPFP1L]
213 lr r1, [_ARC_V2_JLI_BASE]
214 lr r0, [_ARC_V2_LDI_BASE]
[all …]
/arch/arm/core/
A Duserspace.S48 mov lr, r0
184 mov lr, r4
188 pop {r1,r2,r3,lr}
245 mov r0, lr
348 mov r1, lr
373 push {ip, lr}
405 mov lr, r1
414 push {r1,lr}
418 mov r1, lr
437 mov r1, lr
[all …]

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