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Searched refs:mmio (Results 1 – 2 of 2) sorted by relevance

/arch/x86/core/
A Dearly_serial.c27 static mm_reg_t mmio; variable
28 #define IN(reg) (sys_read32(mmio + (reg) * 4) & 0xff)
29 #define OUT(reg, val) sys_write32((val) & 0xff, mmio + (reg) * 4)
35 static mm_reg_t mmio; variable
36 #define BASE mmio
98 device_map(&mmio, mbar.phys_addr, mbar.size, K_MEM_CACHE_NONE); in z_x86_early_serial_init()
100 device_map(&mmio, X86_SOC_EARLY_SERIAL_MMIO8_ADDR, 0x1000, K_MEM_CACHE_NONE); in z_x86_early_serial_init()
A Dpcie.c31 uint8_t *mmio; member
56 device_map((mm_reg_t *)&bus_segs[i].mmio, phys_addr, size, in pcie_mm_init()
77 = (void *)&bus_segs[i].mmio[bdf << 4]; in pcie_mm_conf()
132 if (bus_segs[0].mmio == NULL) { in pcie_conf()

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