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Searched refs:devad (Results 1 – 16 of 16) sorted by relevance

/drivers/mdio/
A Dmdio_lan865x.c39 static int lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad, in lan865x_mdio_c45_read() argument
44 return eth_lan865x_mdio_c45_read(cfg->dev, prtad, devad, regad, data); in lan865x_mdio_c45_read()
47 static int lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad, in lan865x_mdio_c45_write() argument
52 return eth_lan865x_mdio_c45_write(cfg->dev, prtad, devad, regad, data); in lan865x_mdio_c45_write()
A Dmdio_gpio.c76 static int mdio_gpio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw, in mdio_gpio_transfer() argument
95 mdio_gpio_write(dev_cfg, devad, 5); in mdio_gpio_transfer()
115 static int mdio_gpio_read_mmi(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_gpio_read_mmi() argument
118 return mdio_gpio_transfer(dev, prtad, devad, MDIO_GPIO_READ_OP, 0, data); in mdio_gpio_read_mmi()
121 static int mdio_gpio_write_mmi(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_gpio_write_mmi() argument
124 return mdio_gpio_transfer(dev, prtad, devad, MDIO_GPIO_WRITE_OP, data, NULL); in mdio_gpio_write_mmi()
A Dmdio_litex_liteeth.c98 static int mdio_litex_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw, in mdio_litex_transfer() argument
116 mdio_litex_write(dev_cfg, devad, 5); in mdio_litex_transfer()
134 static int mdio_litex_read_mmi(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_litex_read_mmi() argument
137 return mdio_litex_transfer(dev, prtad, devad, LITEX_MDIO_READ_OP, 0, data); in mdio_litex_read_mmi()
140 static int mdio_litex_write_mmi(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_litex_write_mmi() argument
143 return mdio_litex_transfer(dev, prtad, devad, LITEX_MDIO_WRITE_OP, data, NULL); in mdio_litex_write_mmi()
A Dmdio_sam.c96 uint8_t devad, uint16_t regad, uint16_t *data) in mdio_sam_read_c45() argument
100 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_ADDRESS, true, in mdio_sam_read_c45()
103 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_READ, true, in mdio_sam_read_c45()
111 uint8_t devad, uint16_t regad, uint16_t data) in mdio_sam_write_c45() argument
115 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_ADDRESS, true, in mdio_sam_write_c45()
118 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_WRITE, true, in mdio_sam_write_c45()
A Dmdio_nxp_enet.c127 static int nxp_enet_mdio_read_c45(const struct device *dev, uint8_t prtad, uint8_t devad, in nxp_enet_mdio_read_c45() argument
132 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_ADDRESS, true, regad, NULL); in nxp_enet_mdio_read_c45()
134 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_READ, true, 0, data); in nxp_enet_mdio_read_c45()
140 int nxp_enet_mdio_write_c45(const struct device *dev, uint8_t prtad, uint8_t devad, uint16_t regad, in nxp_enet_mdio_write_c45() argument
145 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_ADDRESS, true, regad, NULL); in nxp_enet_mdio_write_c45()
147 err = mdio_transfer(dev, prtad, devad, MDIO_OP_C45_WRITE, true, data, NULL); in nxp_enet_mdio_write_c45()
A Dmdio_adin2111.c59 uint8_t devad, uint16_t regad, in mdio_adin2111_read_c45() argument
69 cmd |= (devad & 0x1FU) << 16; in mdio_adin2111_read_c45()
99 uint8_t devad, uint16_t regad, in mdio_adin2111_write_c45() argument
110 cmd |= (devad & 0x1FU) << 16; in mdio_adin2111_write_c45()
A Dmdio_nxp_s32_gmac.c38 static int mdio_nxp_s32_read_c45(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_nxp_s32_read_c45() argument
50 status = Gmac_Ip_MDIOReadMMD(cfg->instance, prtad, devad, regad, regval, in mdio_nxp_s32_read_c45()
58 static int mdio_nxp_s32_write_c45(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_nxp_s32_write_c45() argument
70 status = Gmac_Ip_MDIOWriteMMD(cfg->instance, prtad, devad, regad, regval, in mdio_nxp_s32_write_c45()
A Dmdio_xilinx_axienet.c167 static int mdio_xilinx_axienet_read(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_xilinx_axienet_read() argument
193 (devad << XILINX_AXIENET_MDIO_CONTROL_REG_SHIFT_REGADDR) | in mdio_xilinx_axienet_read()
229 static int mdio_xilinx_axienet_write(const struct device *dev, uint8_t prtad, uint8_t devad, in mdio_xilinx_axienet_write() argument
260 (devad << XILINX_AXIENET_MDIO_CONTROL_REG_SHIFT_REGADDR) | in mdio_xilinx_axienet_write()
A Dmdio_dwcxgmac.c86 static int mdio_transfer(const struct device *dev, uint8_t prtad, uint8_t devad, uint8_t rw, in mdio_transfer() argument
113 mdio_addr = CORE_MDIO_SINGLE_COMMAND_ADDRESS_RA_SET(devad) | in mdio_transfer()
/drivers/ethernet/phy/
A Dphy_microchip_t1s.c138 static int mdio_setup_c45_indirect_access(const struct device *dev, uint16_t devad, uint16_t reg) in mdio_setup_c45_indirect_access() argument
143 ret = mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad); in mdio_setup_c45_indirect_access()
153 return mdio_write(cfg->mdio, cfg->phy_addr, MII_MMD_ACR, devad | BIT(14)); in mdio_setup_c45_indirect_access()
156 static int phy_mc_t1s_c45_read(const struct device *dev, uint8_t devad, uint16_t reg, uint16_t *val) in phy_mc_t1s_c45_read() argument
164 return mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_mc_t1s_c45_read()
170 ret = mdio_setup_c45_indirect_access(dev, devad, reg); in phy_mc_t1s_c45_read()
183 static int phy_mc_t1s_c45_write(const struct device *dev, uint8_t devad, uint16_t reg, uint16_t val) in phy_mc_t1s_c45_write() argument
191 return mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_mc_t1s_c45_write()
197 ret = mdio_setup_c45_indirect_access(dev, devad, reg); in phy_mc_t1s_c45_write()
A Dphy_adin2111.c125 static int phy_adin2111_c45_setup_dev_reg(const struct device *dev, uint16_t devad, in phy_adin2111_c45_setup_dev_reg() argument
131 rval = mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS_CNTRL, devad); in phy_adin2111_c45_setup_dev_reg()
140 return mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS_CNTRL, devad | BIT(14)); in phy_adin2111_c45_setup_dev_reg()
143 static int phy_adin2111_c45_read(const struct device *dev, uint16_t devad, in phy_adin2111_c45_read() argument
151 rval = phy_adin2111_c45_setup_dev_reg(dev, devad, reg); in phy_adin2111_c45_read()
159 return mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_adin2111_c45_read()
162 static int phy_adin2111_c45_write(const struct device *dev, uint16_t devad, in phy_adin2111_c45_write() argument
170 rval = phy_adin2111_c45_setup_dev_reg(dev, devad, reg); in phy_adin2111_c45_write()
178 return mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_adin2111_c45_write()
A Dphy_tja1103.c97 static inline int phy_tja1103_c45_write(const struct device *dev, uint16_t devad, uint16_t reg, in phy_tja1103_c45_write() argument
102 return mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_tja1103_c45_write()
105 static inline int phy_tja1103_c45_read(const struct device *dev, uint16_t devad, uint16_t reg, in phy_tja1103_c45_read() argument
110 return mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_tja1103_c45_read()
/drivers/ethernet/
A Doa_tc6.c175 static int oa_tc6_get_phy_c45_mms(int devad) in oa_tc6_get_phy_c45_mms() argument
177 switch (devad) { in oa_tc6_get_phy_c45_mms()
191 int oa_tc6_mdio_read_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad, in oa_tc6_mdio_read_c45() argument
197 ret = oa_tc6_get_phy_c45_mms(devad); in oa_tc6_mdio_read_c45()
212 int oa_tc6_mdio_write_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad, in oa_tc6_mdio_write_c45() argument
217 ret = oa_tc6_get_phy_c45_mms(devad); in oa_tc6_mdio_write_c45()
A Doa_tc6.h303 int oa_tc6_mdio_read_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,
320 int oa_tc6_mdio_write_c45(struct oa_tc6 *tc6, uint8_t prtad, uint8_t devad, uint16_t regad,
A Deth_lan865x.c41 int eth_lan865x_mdio_c45_read(const struct device *dev, uint8_t prtad, uint8_t devad, in eth_lan865x_mdio_c45_read() argument
46 return oa_tc6_mdio_read_c45(ctx->tc6, prtad, devad, regad, data); in eth_lan865x_mdio_c45_read()
49 int eth_lan865x_mdio_c45_write(const struct device *dev, uint8_t prtad, uint8_t devad, in eth_lan865x_mdio_c45_write() argument
54 return oa_tc6_mdio_write_c45(ctx->tc6, prtad, devad, regad, data); in eth_lan865x_mdio_c45_write()
A Deth_smsc91x.c849 static int mdio_smsc_read(const struct device *dev, uint8_t prtad, uint8_t devad, uint16_t *data) in mdio_smsc_read() argument
856 *data = smsc_miibus_readreg(sc, prtad, devad); in mdio_smsc_read()
861 static int mdio_smsc_write(const struct device *dev, uint8_t prtad, uint8_t devad, uint16_t data) in mdio_smsc_write() argument
868 smsc_miibus_writereg(sc, prtad, devad, data); in mdio_smsc_write()

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