Home
last modified time | relevance | path

Searched refs:flag (Results 1 – 25 of 29) sorted by relevance

12

/drivers/gpio/
A Dgpio_renesas_rz.h131 #define GPIO_RZ_FLAG_GET_CONFIG(flag) (((flag >> RZ_GPIO_IOLH_SHIFT) & 0x3) << 10U) argument
132 #define GPIO_RZ_FLAG_GET_FILTER(flag) (((flags >> RZ_GPIO_FILTER_SHIFT) & 0x1F) << 19U) argument
134 #define GPIO_RZ_FLAG_GET_SPECIFIC(flag) GPIO_RZ_FLAG_GET_FILTER(flag) argument
175 #define GPIO_RZ_FLAG_GET_CONFIG(flag) (((flag >> RZTN_GPIO_DRCTL_SHIFT) & 0x33) << 8U) argument
177 #define GPIO_RZ_FLAG_GET_SPECIFIC(flag) IOPORT_CFG_REGION_NSAFETY argument
A Dgpio_silabs.c264 sl_gpio_interrupt_flag_t flag = SL_GPIO_INTERRUPT_RISING_FALLING_EDGE; in gpio_silabs_pin_interrupt_configure() local
291 flag = SL_GPIO_INTERRUPT_FALLING_EDGE; in gpio_silabs_pin_interrupt_configure()
293 flag = SL_GPIO_INTERRUPT_RISING_EDGE; in gpio_silabs_pin_interrupt_configure()
295 flag = SL_GPIO_INTERRUPT_RISING_FALLING_EDGE; in gpio_silabs_pin_interrupt_configure()
298 int_no = sl_hal_gpio_configure_external_interrupt(&gpio, int_no, flag); in gpio_silabs_pin_interrupt_configure()
A Dgpio_mcux_igpio.c179 if ((flag & GPIO_PULL_DOWN) != 0) { in mcux_igpio_configure()
/drivers/ieee802154/
A Dieee802154_cc2520.c89 if (flag & EXCFLAG0_RF_IDLE) { in cc2520_print_exceptions()
93 if (flag & EXCFLAG0_TX_FRM_DONE) { in cc2520_print_exceptions()
97 if (flag & EXCFLAG0_TX_ACK_DONE) { in cc2520_print_exceptions()
105 if (flag & EXCFLAG0_TX_OVERFLOW) { in cc2520_print_exceptions()
121 flag = read_reg_excflag1(cc2520); in cc2520_print_exceptions()
141 if (flag & EXCFLAG1_FIFOP) { in cc2520_print_exceptions()
145 if (flag & EXCFLAG1_SFD) { in cc2520_print_exceptions()
149 if (flag & EXCFLAG1_DPU_DONE_L) { in cc2520_print_exceptions()
153 if (flag & EXCFLAG1_DPU_DONE_H) { in cc2520_print_exceptions()
176 if (flag & EXCFLAG2_SPI_ERROR) { in cc2520_print_errors()
[all …]
/drivers/serial/
A Duart_ambiq.c226 uint32_t flag = 0; in uart_ambiq_is_readable() local
232 am_hal_uart_flags_get(data->uart_handler, &flag); in uart_ambiq_is_readable()
234 return (flag & UART0_FR_RXFE_Msk) == 0U; in uart_ambiq_is_readable()
240 uint32_t flag = 0; in uart_ambiq_poll_in() local
249 return flag & UART_AMBIQ_RSR_ERROR_MASK; in uart_ambiq_poll_in()
255 uint32_t flag = 0; in uart_ambiq_poll_out() local
261 } while (flag & UART0_FR_TXFF_Msk); in uart_ambiq_poll_out()
404 uint32_t flag = 0; in uart_ambiq_irq_tx_complete() local
407 return ((flag & AM_HAL_UART_FR_BUSY) == 0); in uart_ambiq_irq_tx_complete()
414 uint32_t status, flag = 0; in uart_ambiq_irq_tx_ready() local
[all …]
A Duart_async_to_irq.c235 static void dir_disable(const struct device *dev, uint32_t flag) in dir_disable() argument
239 atomic_and(&data->flags, ~flag); in dir_disable()
242 static void dir_enable(const struct device *dev, uint32_t flag) in dir_enable() argument
246 atomic_or(&data->flags, flag); in dir_enable()
A DKconfig.xen44 Xen, compiled with CONFIG_DEBUG flag.
A Duart_mchp_xec.c223 static void uart_xec_pm_policy_state_lock_get(enum uart_xec_pm_policy_state_flag flag) in uart_xec_pm_policy_state_lock_get() argument
225 if (atomic_test_and_set_bit(pm_policy_state_flag, flag) == 0) { in uart_xec_pm_policy_state_lock_get()
230 static void uart_xec_pm_policy_state_lock_put(enum uart_xec_pm_policy_state_flag flag) in uart_xec_pm_policy_state_lock_put() argument
232 if (atomic_test_and_clear_bit(pm_policy_state_flag, flag) == 1) { in uart_xec_pm_policy_state_lock_put()
A Duart_npcx.c103 enum uart_pm_policy_state_flag flag) in uart_npcx_pm_policy_state_lock_get() argument
105 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in uart_npcx_pm_policy_state_lock_get()
111 enum uart_pm_policy_state_flag flag) in uart_npcx_pm_policy_state_lock_put() argument
113 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) { in uart_npcx_pm_policy_state_lock_put()
/drivers/dma/
A Ddma_gd32.c243 DMA_INTC0(reg) |= DMA_FLAG_ADD(flag, ch); in gd32_dma_interrupt_flag_clear()
245 DMA_INTC1(reg) |= DMA_FLAG_ADD(flag, ch - DMA_CH4); in gd32_dma_interrupt_flag_clear()
248 GD32_DMA_INTC(reg) |= DMA_FLAG_ADD(flag, ch); in gd32_dma_interrupt_flag_clear()
253 gd32_dma_flag_clear(uint32_t reg, dma_channel_enum ch, uint32_t flag) in gd32_dma_flag_clear() argument
257 DMA_INTC0(reg) |= DMA_FLAG_ADD(flag, ch); in gd32_dma_flag_clear()
259 DMA_INTC1(reg) |= DMA_FLAG_ADD(flag, ch - DMA_CH4); in gd32_dma_flag_clear()
262 GD32_DMA_INTC(reg) |= DMA_FLAG_ADD(flag, ch); in gd32_dma_flag_clear()
267 gd32_dma_interrupt_flag_get(uint32_t reg, dma_channel_enum ch, uint32_t flag) in gd32_dma_interrupt_flag_get() argument
271 return (DMA_INTF0(reg) & DMA_FLAG_ADD(flag, ch)); in gd32_dma_interrupt_flag_get()
273 return (DMA_INTF1(reg) & DMA_FLAG_ADD(flag, ch - DMA_CH4)); in gd32_dma_interrupt_flag_get()
[all …]
A DKconfig.dw_axi_dmac27 This flag can be enabled if hardware support Linked List multi-block transfer
45 update this flag to change the axi master interface data width
A Ddma_mcux_edma.c121 #define EDMA_TCD_SADDR(tcd, flag) ((tcd)->SADDR) argument
122 #define EDMA_TCD_DADDR(tcd, flag) ((tcd)->DADDR) argument
123 #define EDMA_TCD_BITER(tcd, flag) ((tcd)->BITER) argument
124 #define EDMA_TCD_CITER(tcd, flag) ((tcd)->CITER) argument
125 #define EDMA_TCD_CSR(tcd, flag) ((tcd)->CSR) argument
126 #define EDMA_TCD_DLAST_SGA(tcd, flag) ((tcd)->DLAST_SGA) argument
216 uint32_t flag = EDMA_GetChannelStatusFlags(DEV_BASE(dev), hw_channel); in dma_mcux_edma_irq_handler() local
218 if (flag & kEDMA_InterruptFlag) { in dma_mcux_edma_irq_handler()
227 else if (flag & kEDMA_ErrorFlag) { in dma_mcux_edma_irq_handler()
231 LOG_INF("channel %d error status is 0x%x", channel, flag); in dma_mcux_edma_irq_handler()
A DKconfig.dw_common32 with the DRAIN bit flag set to allow for the hardware FIFO to be drained
/drivers/counter/
A DKconfig.nrfx19 # Internal flag which detects if PPI wrap feature is enabled for any instance
28 # Internal flag which detects if fixed top feature is enabled for any instance
/drivers/adc/
A Dadc_mchp_xec.c91 enum adc_pm_policy_state_flag flag) in adc_xec_pm_policy_state_lock_get() argument
93 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in adc_xec_pm_policy_state_lock_get()
99 enum adc_pm_policy_state_flag flag) in adc_xec_pm_policy_state_lock_put() argument
101 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) { in adc_xec_pm_policy_state_lock_put()
/drivers/sdhc/
A DKconfig.sdhc_cdns24 configure this flag if they require to transfer more than 8*64Kb of data.
/drivers/peci/
A Dpeci_mchp_xec.c72 enum peci_pm_policy_state_flag flag) in peci_xec_pm_policy_state_lock_get() argument
74 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in peci_xec_pm_policy_state_lock_get()
80 enum peci_pm_policy_state_flag flag) in peci_xec_pm_policy_state_lock_put() argument
82 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) { in peci_xec_pm_policy_state_lock_put()
/drivers/flash/
A Dflash_npcx_fiu_nor.c463 int flag = 0; in flash_npcx_nor_ex_exec_uma() local
475 flag |= NPCX_UMA_ACCESS_WRITE; in flash_npcx_nor_ex_exec_uma()
480 flag |= NPCX_UMA_ACCESS_ADDR; in flash_npcx_nor_ex_exec_uma()
486 flag |= NPCX_UMA_ACCESS_READ; in flash_npcx_nor_ex_exec_uma()
489 return flash_npcx_uma_transceive(dev, &cfg, flag); in flash_npcx_nor_ex_exec_uma()
/drivers/rtc/
A Drtc_rx8130ce.c100 uint8_t flag; member
249 if ((data->reg.flag & FLAG_AF) != 0) { in rx8130ce_irq_work_handler()
256 if ((data->reg.flag & FLAG_UF) != 0) { in rx8130ce_irq_work_handler()
263 data->reg.flag &= ~(FLAG_AF | FLAG_UF); in rx8130ce_irq_work_handler()
508 data->reg.flag &= ~FLAG_AF; in rx8130ce_alarm_set_callback()
671 data->reg.flag = 0x00; in rx8130ce_init()
/drivers/spi/
A DKconfig.stm3247 int "timeout in us for the STM32 busy flag workaround"
/drivers/pcie/host/
A Dpcie.c371 static bool scan_flag(const struct pcie_scan_opt *opt, uint32_t flag) in scan_flag() argument
373 return ((opt->flags & flag) != 0U); in scan_flag()
/drivers/i2c/
A Di2c_npcx_controller.c221 enum i2c_pm_policy_state_flag flag) in i2c_npcx_pm_policy_state_lock_get() argument
230 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in i2c_npcx_pm_policy_state_lock_get()
236 enum i2c_pm_policy_state_flag flag) in i2c_npcx_pm_policy_state_lock_put() argument
245 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) { in i2c_npcx_pm_policy_state_lock_put()
A Di2c_ite_it51xxx.c397 enum i2c_ite_pm_policy_state_flag flag) in i2c_ite_pm_policy_state_lock_get() argument
399 if (atomic_test_and_set_bit(data->pm_policy_state_flag, flag) == 0) { in i2c_ite_pm_policy_state_lock_get()
405 enum i2c_ite_pm_policy_state_flag flag) in i2c_ite_pm_policy_state_lock_put() argument
407 if (atomic_test_and_clear_bit(data->pm_policy_state_flag, flag) == 1) { in i2c_ite_pm_policy_state_lock_put()
/drivers/timer/
A DKconfig46 Timer drivers should select this flag if they are capable of
/drivers/console/
A DKconfig82 int "Fixed amount of time to keep the UART console in use flag true"
87 console in use flag true.

Completed in 68 milliseconds

12