Home
last modified time | relevance | path

Searched refs:host_ctrl2 (Results 1 – 4 of 4) sorted by relevance

/drivers/sdhc/
A Dxlnx_sdhc.c819 reg->host_ctrl2 &= ~XLNX_SDHC_HC2_1V8_EN_MASK; in xlnx_sdhc_set_voltage()
824 reg->host_ctrl2 &= ~XLNX_SDHC_HC2_1V8_EN_MASK; in xlnx_sdhc_set_voltage()
828 reg->host_ctrl2 |= XLNX_SDHC_HC2_1V8_EN_MASK; in xlnx_sdhc_set_voltage()
1068 reg->host_ctrl2 &= ~XLNX_SDHC_HC2_UHS_MODE; in xlnx_sdhc_set_timing()
1069 reg->host_ctrl2 |= mode; in xlnx_sdhc_set_timing()
1251 reg->host_ctrl2 |= XLNX_SDHC_HC2_EXEC_TNG_MASK; in xlnx_sdhc_card_tuning()
1258 if ((reg->host_ctrl2 & XLNX_SDHC_HC2_EXEC_TNG_MASK) == 0U) { in xlnx_sdhc_card_tuning()
1264 if ((reg->host_ctrl2 & XLNX_SDHC_HC2_SAMP_CLK_SEL_MASK) == 0U) { in xlnx_sdhc_card_tuning()
A Dintel_emmc_host.c105 regs->host_ctrl2 &= in emmc_set_voltage()
119 regs->host_ctrl2 &= in emmc_set_voltage()
133 regs->host_ctrl2 |= EMMC_HOST_CTRL2_1P8V_SIG_EN in emmc_set_voltage()
318 regs->host_ctrl2 |= EMMC_HOST_CTRL2_1P8V_SIG_EN << EMMC_HOST_CTRL2_1P8V_SIG_LOC; in set_timing()
319 SET_BITS(regs->host_ctrl2, EMMC_HOST_CTRL2_UHS_MODE_SEL_LOC, in set_timing()
1116 regs->host_ctrl2 |= EMMC_HOST_START_TUNING; in emmc_execute_tuning()
1117 while (!(regs->host_ctrl2 & EMMC_HOST_START_TUNING)) { in emmc_execute_tuning()
1121 if (regs->host_ctrl2 & EMMC_HOST_TUNING_SUCCESS) { in emmc_execute_tuning()
A Dxlnx_sdhc.h231 volatile uint16_t host_ctrl2; /**< Host Control 2 */ member
A Dintel_emmc_host.h216 volatile uint16_t host_ctrl2; /**< Host Control 2 */ member

Completed in 17 milliseconds