Home
last modified time | relevance | path

Searched refs:idx (Results 1 – 25 of 342) sorted by relevance

12345678910>>...14

/drivers/pcie/host/
A Dvc.c41 int idx; in pcie_vc_load_resources_regs() local
43 for (idx = 0; idx < nb_regs; idx++) { in pcie_vc_load_resources_regs()
84 int idx; in pcie_vc_enable() local
91 for (idx = 1; idx < regs.cap_reg_1.vc_count + 1; idx++) { in pcie_vc_enable()
109 int idx; in pcie_vc_disable() local
116 for (idx = 1; idx < regs.cap_reg_1.vc_count + 1; idx++) { in pcie_vc_disable()
132 int idx; in pcie_vc_map_tc() local
145 for (idx = 0; idx < map->vc_count; idx++) { in pcie_vc_map_tc()
159 for (idx = 0; idx < regs.cap_reg_1.vc_count + 1; idx++) { in pcie_vc_map_tc()
162 res_regs[idx].ctrl_reg.vc_id = idx; in pcie_vc_map_tc()
[all …]
/drivers/pinctrl/
A Dpinctrl_mchp_mec5.c36 size_t idx = 0; in mec5_config_pin() local
57 idx++; in mec5_config_pin()
65 idx++; in mec5_config_pin()
85 idx++; in mec5_config_pin()
91 cfg2[idx].val = 0u; in mec5_config_pin()
93 cfg2[idx].val = 1u; in mec5_config_pin()
95 idx++; in mec5_config_pin()
105 idx++; in mec5_config_pin()
114 idx++; in mec5_config_pin()
119 idx++; in mec5_config_pin()
[all …]
/drivers/serial/
A Duart_gecko.c779 .pin_tx = PIN_UART_TXD(idx),
823 .pin_cts = PIN_UART_CTS(idx),
852 GET_GECKO_UART_CLOCK(idx) \
853 GECKO_UART_RX_TX_PINS(idx) \
865 DEVICE_DT_INST_DEFINE(idx, uart_gecko_init, PM_DEVICE_DT_INST_GET(idx), \
866 &uart_gecko_data_##idx, &uart_gecko_cfg_##idx, \
870 GECKO_UART_IRQ_HANDLER(idx)
928 DEVICE_DT_INST_DEFINE(idx, uart_gecko_init, PM_DEVICE_DT_INST_GET(idx), \
934 GECKO_USART_IRQ_HANDLER(idx)
967 DEVICE_DT_INST_DEFINE(idx, uart_gecko_init, PM_DEVICE_DT_INST_GET(idx), \
[all …]
A Duart_rtt.c176 #define UART_RTT(idx) DT_NODELABEL(rtt##idx) argument
177 #define UART_RTT_PROP(idx, prop) DT_PROP(UART_RTT(idx), prop) argument
178 #define UART_RTT_CONFIG_NAME(idx) uart_rtt##idx##_config argument
180 #define UART_RTT_CONFIG(idx) \ argument
182 uint8_t uart_rtt##idx##_tx_buf[UART_RTT_PROP(idx, tx_buffer_size)]; \
184 uint8_t uart_rtt##idx##_rx_buf[UART_RTT_PROP(idx, rx_buffer_size)]; \
187 .up_buffer = uart_rtt##idx##_tx_buf, \
189 .down_buffer = uart_rtt##idx##_rx_buf, \
191 .channel = idx, \
194 #define UART_RTT_INIT(idx, config) \ argument
[all …]
/drivers/gpio/
A Dgpio_xlnx_ps.c122 #define GPIO_XLNX_PS_DEV_DATA(idx)\ argument
127 #define GPIO_XLNX_PS_DEV_CONFIG(idx)\ argument
143 IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority),\
145 irq_enable(DT_INST_IRQN(idx));\
149 #define GPIO_XLNX_PS_DEV_DEFINE(idx)\ argument
151 &gpio_xlnx_ps##idx##_data, &gpio_xlnx_ps##idx##_cfg,\
160 GPIO_XLNX_PS_GEN_BANK_ARRAY(idx)\
161 GPIO_XLNX_PS_DEV_CONFIG_IRQ_FUNC(idx)\
162 GPIO_XLNX_PS_DEV_DATA(idx)\
163 GPIO_XLNX_PS_DEV_CONFIG(idx)\
[all …]
/drivers/comparator/
A Dcomparator_renesas_ra.c232 (DT_INST_IRQ_BY_NAME(idx, hs, irq)), (FSP_INVALID_VECTOR))
236 (DT_INST_IRQ_BY_NAME(idx, hs, priority)), (BSP_IRQ_DISABLED))
239 COND_CODE_1(DT_INST_IRQ_HAS_NAME(idx, hs), (ACMPHS_RENESAS_RA_IRQ_INIT(idx);), ())
245 DT_INST_STRING_UPPER_TOKEN(idx, compare_input_source)), \
248 DT_INST_STRING_UPPER_TOKEN(idx, reference_input_source)), \
258 .channel = DT_INST_PROP(idx, channel), \
261 .filter = FILTER_PARAMETER(idx), \
262 .invert = INVERT_PARAMETER(idx), \
263 .pin_output = PIN_OUTPUT_PARAMETER(idx), \
277 DEVICE_DT_INST_DEFINE(idx, acmphs_renesas_ra_init##idx, NULL, \
[all …]
/drivers/led_strip/
A Dws2812_spi.c218 (DT_INST_PROP(idx, chain_length))
219 #define WS2812_SPI_ONE_FRAME(idx) \ argument
220 (DT_INST_PROP(idx, spi_one_frame))
225 #define WS2812_NUM_COLORS(idx) \ argument
227 #define WS2812_SPI_BUFSZ(idx) \ argument
238 DT_INST_PROP(idx, color_mapping)
241 #define WS2812_RESET_DELAY(idx) DT_INST_PROP(idx, reset_delay) argument
249 static uint8_t ws2812_spi_##idx##_px_buf[WS2812_SPI_BUFSZ(idx)] \
252 WS2812_COLOR_MAPPING(idx); \
255 .bus = SPI_DT_SPEC_INST_GET(idx, SPI_OPER(idx), 0), \
[all …]
A Dws2812_i2s.c210 #define WS2812_I2S_LRCK_PERIOD_US(idx) DT_INST_PROP(idx, lrck_period) argument
212 #define WS2812_RESET_DELAY_US(idx) DT_INST_PROP(idx, reset_delay) argument
215 DIV_ROUND_UP(WS2812_RESET_DELAY_US(idx), WS2812_I2S_LRCK_PERIOD_US(idx))
217 #define WS2812_NUM_COLORS(idx) (DT_INST_PROP_LEN(idx, color_mapping)) argument
219 #define WS2812_I2S_NUM_PIXELS(idx) (DT_INST_PROP(idx, chain_length)) argument
222 (((WS2812_NUM_COLORS(idx) * WS2812_I2S_NUM_PIXELS(idx)) + \
223 WS2812_I2S_PRE_DELAY_WORDS + WS2812_RESET_DELAY_WORDS(idx)) * 4)
227 K_MEM_SLAB_DEFINE_STATIC(ws2812_i2s_##idx##_slab, WS2812_I2S_BUFSIZE(idx), 2, 4); \
230 DT_INST_PROP(idx, color_mapping); \
233 .dev = DEVICE_DT_GET(DT_INST_BUS(idx)), \
[all …]
/drivers/i2c/
A Di2c_nrfx_twim_rtio.c227 COND_CODE_0(CONCAT_BUF_SIZE(idx), (COND_CODE_0(FLASH_BUF_MAX_SIZE(idx), (0), (1))), (1))
228 #define MSG_BUF_SIZE(idx) MAX(CONCAT_BUF_SIZE(idx), FLASH_BUF_MAX_SIZE(idx)) argument
246 #define MSG_BUF_SYM(idx) \ argument
247 _CONCAT_3(twim_, idx, _msg_buf)
249 #define MSG_BUF_DEFINE(idx) \ argument
250 static uint8_t MSG_BUF_SYM(idx)[MSG_BUF_SIZE(idx)] MSG_BUF_ATTR(idx)
252 #define MAX_TRANSFER_SIZE(idx) \ argument
262 IRQ_CONNECT(DT_IRQN(I2C(idx)), DT_IRQ(I2C(idx), priority), nrfx_isr, \
265 IF_ENABLED(USES_MSG_BUF(idx), (MSG_BUF_DEFINE(idx);)) \
285 IF_ENABLED(USES_MSG_BUF(idx), (.msg_buf = MSG_BUF_SYM(idx),)) \
[all …]
A Di2c_nrfx_twim.c241 #define CONCAT_BUF_SIZE(idx) \ argument
248 #define USES_MSG_BUF(idx) \ argument
252 #define MSG_BUF_SIZE(idx) MAX(CONCAT_BUF_SIZE(idx), FLASH_BUF_MAX_SIZE(idx)) argument
262 IRQ_CONNECT(DT_IRQN(I2C(idx)), DT_IRQ(I2C(idx), priority), \
265 IF_ENABLED(USES_MSG_BUF(idx), \
266 (static uint8_t twim_##idx##_msg_buf[MSG_BUF_SIZE(idx)] \
267 I2C_MEMORY_SECTION(idx);)) \
269 PINCTRL_DT_DEFINE(I2C(idx)); \
282 IF_ENABLED(USES_MSG_BUF(idx), \
293 &twim_##idx##_data, \
[all …]
A Di2c_nrfx_twi.c134 #define I2C_NRFX_TWI_DEVICE(idx) \ argument
136 BUILD_ASSERT(I2C_FREQUENCY(idx) != \
141 IRQ_CONNECT(DT_IRQN(I2C(idx)), DT_IRQ(I2C(idx), priority), \
157 PINCTRL_DT_DEFINE(I2C(idx)); \
159 .twi = NRFX_TWI_INSTANCE(idx), \
163 .frequency = I2C_FREQUENCY(idx), \
169 I2C_DEVICE_DT_DEFINE(I2C(idx), \
170 twi_##idx##_init, \
171 PM_DEVICE_DT_GET(I2C(idx)), \
172 &twi_##idx##_data, \
[all …]
A Di2c_sy1xx.c70 uint32_t idx; in sy1xx_i2c_ctrl_init() local
83 idx = 0; in sy1xx_i2c_ctrl_init()
193 uint32_t idx; in sy1xx_i2c_read() local
200 idx = 0; in sy1xx_i2c_read()
211 buf[idx++] = msg->len - 1; in sy1xx_i2c_read()
223 buf[idx++] = 1; in sy1xx_i2c_read()
231 wait = &buf[idx]; in sy1xx_i2c_read()
274 uint32_t idx; in sy1xx_i2c_write() local
280 idx = 0; in sy1xx_i2c_write()
291 buf[idx++] = msg->len; in sy1xx_i2c_write()
[all …]
/drivers/mbox/
A Dmbox_nrf_vevif_task_rx.c34 #define VEVIF_IRQN(idx, _) DT_INST_IRQ_BY_IDX(0, idx, irq) argument
47 if (cbs.cb[idx] != NULL) { in vevif_task_rx_isr()
48 cbs.cb[idx](DEVICE_DT_INST_GET(0), channel, cbs.user_data[idx], NULL); in vevif_task_rx_isr()
68 uint8_t idx = id - TASKS_IDX_MIN; in vevif_task_rx_register_callback() local
74 cbs.cb[idx] = cb; in vevif_task_rx_register_callback()
75 cbs.user_data[idx] = user_data; in vevif_task_rx_register_callback()
83 uint8_t idx = id - TASKS_IDX_MIN; in vevif_task_rx_set_enabled() local
95 irq_enable(vevif_irqs[idx]); in vevif_task_rx_set_enabled()
102 irq_disable(vevif_irqs[idx]); in vevif_task_rx_set_enabled()
116 IRQ_CONNECT(DT_INST_IRQ_BY_IDX(0, idx, irq), DT_INST_IRQ_BY_IDX(0, idx, priority), \
[all …]
A Dmbox_renesas_rz_mhu.c289 IRQ_CONNECT(DT_INST_IRQ_BY_NAME(idx, irq_name, irq), \
290 DT_INST_IRQ_BY_NAME(idx, irq_name, priority), isr, \
291 DEVICE_DT_INST_GET(idx), 0); \
292 irq_enable(DT_INST_IRQ_BY_NAME(idx, irq_name, irq)); \
295 #define MHU_RZG_CONFIG_FUNC(idx) MHU_RZG_IRQ_CONNECT(idx, mhuns, mbox_rz_mhu_isr); argument
300 .channel = DT_INST_PROP(idx, channel), \
301 .rx_ipl = DT_INST_IRQ_BY_NAME(idx, mhuns, priority), \
302 .rx_irq = DT_INST_IRQ_BY_NAME(idx, mhuns, irq), \
305 .p_shared_memory = (void *)COND_CODE_1(DT_INST_NODE_HAS_PROP(idx, shared_memory), \
325 DEVICE_DT_INST_DEFINE(idx, mbox_rz_mhu_init_##idx, NULL, &mbox_rz_mhu_data_##idx, \
[all …]
A Dmbox_nxp_imx_mu.c151 static struct nxp_imx_mu_data nxp_imx_mu_##idx##_data; \
152 const static struct nxp_imx_mu_config nxp_imx_mu_##idx##_config = { \
153 .base = (MU_Type *)DT_INST_REG_ADDR(idx), \
155 void MU_##idx##_IRQHandler(void); \
159 MU_Init(nxp_imx_mu_##idx##_config.base); \
160 IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority), MU_##idx##_IRQHandler, \
162 irq_enable(DT_INST_IRQN(idx)); \
165 DEVICE_DT_INST_DEFINE(idx, nxp_imx_mu_##idx##_init, NULL, &nxp_imx_mu_##idx##_data, \
166 &nxp_imx_mu_##idx##_config, PRE_KERNEL_1, CONFIG_MBOX_INIT_PRIORITY, \
172 const struct device *dev = DEVICE_DT_INST_GET(idx); \
[all …]
/drivers/pwm/
A Dpwm_nrfx.c26 #define ANOMALY_109_EGU_IRQ_CONNECT(idx) _EGU_IRQ_CONNECT(idx) argument
27 #define _EGU_IRQ_CONNECT(idx) \ argument
33 #define ANOMALY_109_EGU_IRQ_CONNECT(idx) argument
38 #define PWM_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(PWM(idx), prop) argument
39 #define PWM_NRFX_IS_FAST(idx) NRF_DT_IS_FAST(PWM(idx)) argument
454 #define PWM_MEM_REGION(idx) DT_PHANDLE(PWM(idx), memory_regions) argument
459 PWM_MEM_REGION(idx)))))), \
486 PWM_MEMORY_SECTION(idx); \
520 IRQ_CONNECT(DT_IRQN(PWM(idx)), DT_IRQ(PWM(idx), priority), \
526 pwm_nrfx_init##idx, PM_DEVICE_DT_GET(PWM(idx)), \
[all …]
A Dpwm_rpi_pico.c202 #define PWM_RPI_INIT(idx) \ argument
204 PINCTRL_DT_INST_DEFINE(idx); \
209 PWM_INST_RPI_SLICE_DIVIDER(idx, 0), \
210 PWM_INST_RPI_SLICE_DIVIDER(idx, 1), \
211 PWM_INST_RPI_SLICE_DIVIDER(idx, 2), \
212 PWM_INST_RPI_SLICE_DIVIDER(idx, 3), \
213 PWM_INST_RPI_SLICE_DIVIDER(idx, 4), \
214 PWM_INST_RPI_SLICE_DIVIDER(idx, 5), \
215 PWM_INST_RPI_SLICE_DIVIDER(idx, 6), \
216 PWM_INST_RPI_SLICE_DIVIDER(idx, 7), \
[all …]
/drivers/adc/
A Dadc_renesas_rz.c340 .p_extend = &g_adc##idx##_cfg_extend, \
341 .scan_end_irq = DT_INST_IRQ_BY_NAME(idx, scanend, irq), \
342 .scan_end_ipl = DT_INST_IRQ_BY_NAME(idx, scanend, priority), \
376 .unit = DT_INST_PROP(idx, unit), \
383 .p_extend = &g_adc##idx##_cfg_extend, \
384 .scan_end_irq = DT_INST_IRQ_BY_NAME(idx, scanend, irq), \
385 .scan_end_ipl = DT_INST_IRQ_BY_NAME(idx, scanend, priority), \
413 DEVICE_DT_INST_GET(idx), GET_IRQ_FLAGS(idx)); \
417 #define ADC_RZ_CONFIG_FUNC(idx) ADC_RZ_IRQ_CONNECT(idx, scanend, adc_rz_isr); argument
439 DEVICE_DT_INST_DEFINE(idx, adc_rz_init_##idx, NULL, &adc_rz_data_##idx, \
[all …]
A Dadc_renesas_ra.c314 #define EVENT_ADC_SCAN_END(idx) BSP_PRV_IELS_ENUM(CONCAT(EVENT_ADC, idx, _SCAN_END)) argument
319 R_ICU->IELSR[DT_INST_IRQ_BY_NAME(idx, scanend, irq)] = EVENT_ADC_SCAN_END(idx); \
321 DT_INST_IRQ_BY_NAME(idx, scanend, priority), adc_ra_isr, \
322 DEVICE_DT_INST_GET(idx), 0); \
326 #define IRQ_CONFIGURE_DEFINE(idx) .irq_configure = adc_ra_configure_func_##idx argument
361 .unit = idx, \
368 .p_extend = &g_adc_cfg_extend_##idx, \
369 .scan_end_irq = DT_INST_IRQ_BY_NAME(idx, scanend, irq), \
370 .scan_end_ipl = DT_INST_IRQ_BY_NAME(idx, scanend, priority), \
386 DEVICE_DT_INST_DEFINE(idx, adc_ra_init, NULL, &adc_ra_data_##idx, &adc_ra_config_##idx, \
[all …]
A Dadc_rpi_pico.c344 #define IRQ_CONFIGURE_FUNC(idx) \ argument
345 static void adc_rpi_configure_func_##idx(void) \
347 IRQ_CONNECT(DT_INST_IRQN(idx), DT_INST_IRQ(idx, priority), \
348 adc_rpi_isr, DEVICE_DT_INST_GET(idx), 0); \
349 irq_enable(DT_INST_IRQN(idx)); \
352 #define IRQ_CONFIGURE_DEFINE(idx) .irq_configure = adc_rpi_configure_func_##idx argument
360 .ref_internal = DT_INST_PROP(idx, vref_mv), \
365 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(idx), \
379 &adc_rpi_data_##idx, \
380 &adc_rpi_config_##idx, POST_KERNEL, \
[all …]
/drivers/misc/stm32n6_axisram/
A Dstm32n6_axisram.c60 #define STM32N6_AXISRAM_INIT(idx) \ argument
62 COND_CODE_0(DT_INST_CHILD_NUM_STATUS_OKAY(idx), (), ( \
64 static const struct axisram_stm32_cfg axisram_stm32_cfg_##idx = { \
65 .base = (RAMCFG_TypeDef *)DT_INST_REG_ADDR(idx), \
67 .enr = DT_INST_CLOCKS_CELL_BY_NAME(idx, axisram, bits), \
68 .bus = DT_INST_CLOCKS_CELL_BY_NAME(idx, axisram, bus), \
71 .enr = DT_INST_CLOCKS_CELL_BY_NAME(idx, ramcfg, bits), \
72 .bus = DT_INST_CLOCKS_CELL_BY_NAME(idx, ramcfg, bus), \
76 DEVICE_DT_INST_DEFINE(idx, &axisram_stm32_init, NULL, \
77 NULL, &axisram_stm32_cfg_##idx, \
/drivers/sensor/nordic/qdec_nrfx/
A Dqdec_nrfx.c272 #define QDEC(idx) DT_NODELABEL(qdec##idx) argument
273 #define QDEC_PROP(idx, prop) DT_PROP(QDEC(idx), prop) argument
281 static void irq_connect##idx(void) \
283 IRQ_CONNECT(DT_IRQN(QDEC(idx)), DT_IRQ(QDEC(idx), priority), \
287 PINCTRL_DT_DEFINE(QDEC(idx)); \
289 .qdec = NRFX_QDEC_INSTANCE(idx), \
299 .irq_connect = irq_connect##idx, \
302 .steps = QDEC_PROP(idx, steps), \
307 PM_DEVICE_DT_GET(QDEC(idx)), \
308 &qdec_##idx##_data, \
[all …]
/drivers/clock_control/
A Dclock_control_ifx_cat1_fixed_factor_clock.c53 #define FIXED_CLK_INIT(idx) \ argument
54 static const struct fixed_factor_clock_config fixed_factor_clock_config_##idx = { \
55 .divider = DT_INST_PROP_OR(idx, clock_divider, 1u), \
56 .block = DT_INST_PROP(idx, clock_block), \
57 .instance = DT_INST_PROP(idx, clock_instance), \
58 .source_path = DT_INST_PROP_OR(idx, source_path, 1u), \
59 .source_instance = DT_INST_PROP_BY_PHANDLE(idx, clocks, clock_instance), \
61 DEVICE_DT_INST_DEFINE(idx, fixed_factor_clk_init, NULL, NULL, \
62 &fixed_factor_clock_config_##idx, PRE_KERNEL_1, \
/drivers/flash/
A Dspi_flash_at45.c669 #define INST_HAS_RESET_GPIO(idx) \ argument
677 #define INST_HAS_WP_GPIO(idx) \ argument
687 INST_##idx##_BYTES = (DT_INST_PROP(idx, size) / 8), \
688 INST_##idx##_PAGES = (INST_##idx##_BYTES / \
694 INST_RESET_GPIO_SPEC(idx) \
695 INST_WP_GPIO_SPEC(idx) \
701 (.reset = &reset_##idx,)) \
703 (.wp = &wp_##idx,)) \
728 (INST_##idx##_PAGES * DT_INST_PROP(idx, page_size)) \
729 == INST_##idx##_BYTES, \
[all …]
/drivers/spi/
A Dspi_nrfx_spis.c37 #define SPIS_NODE(idx) \ argument
38 COND_CODE_1(DT_NODE_EXISTS(DT_NODELABEL(spis##idx)), (spis##idx), (spi##idx))
39 #define SPIS(idx) DT_NODELABEL(SPIS_NODE(idx)) argument
40 #define SPIS_PROP(idx, prop) DT_PROP(SPIS(idx), prop) argument
41 #define SPIS_HAS_PROP(idx, prop) DT_NODE_HAS_PROP(SPIS(idx), prop) argument
42 #define SPIS_IS_FAST(idx) NRF_DT_IS_FAST(SPIS(idx)) argument
558 IRQ_CONNECT(DT_IRQN(SPIS(idx)), DT_IRQ(SPIS(idx), priority), \
571 PINCTRL_DT_DEFINE(SPIS(idx)); \
585 .irq_connect = irq_connect##idx, \
605 &spi_##idx##_data, \
[all …]

Completed in 68 milliseconds

12345678910>>...14