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Searched refs:instance (Results 1 – 25 of 57) sorted by relevance

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/drivers/serial/
A Duart_sedi.c82 dev->config)->instance)
91 sedi_uart_t instance; member
257 sedi_uart_write(instance, data); in uart_sedi_poll_out()
359 sedi_uart_irq_tx_enable(instance); in uart_sedi_irq_tx_enable()
370 sedi_uart_irq_tx_disable(instance); in uart_sedi_irq_tx_disable()
405 sedi_uart_irq_rx_enable(instance); in uart_sedi_irq_rx_enable()
412 sedi_uart_irq_rx_disable(instance); in uart_sedi_irq_rx_disable()
433 sedi_uart_irq_err_enable(instance); in uart_sedi_irq_err_enable()
444 sedi_uart_irq_err_disable(instance); in uart_sedi_irq_err_disable()
463 sedi_uart_update_irq_cache(instance); in uart_sedi_irq_update()
[all …]
A Duart_bflb.c530 IRQ_CONNECT(DT_INST_IRQN(instance), \
531 DT_INST_IRQ(instance, priority), \
533 DEVICE_DT_INST_GET(instance), \
535 irq_enable(DT_INST_IRQN(instance)); \
540 #define BFLB_UART_IRQ_HANDLER(instance) argument
544 #define BFLB_UART_INIT(instance) \ argument
545 PINCTRL_DT_INST_DEFINE(instance); \
547 BFLB_UART_IRQ_HANDLER_DECL(instance) \
562 BFLB_UART_IRQ_HANDLER_FUNC(instance) \
566 &uart##instance##_bflb_data, \
[all …]
A Duart_nxp_s32_linflexd.c25 status = Linflexd_Uart_Ip_GetReceiveStatus(config->instance, NULL); in uart_nxp_s32_err_check()
53 Linflexd_Uart_Ip_SyncSend(config->instance, &c, 1, in uart_nxp_s32_poll_out()
75 status = Linflexd_Uart_Ip_SyncReceive(config->instance, c, 1, in uart_nxp_s32_poll_in()
107 Linflexd_Uart_Ip_AsyncSend(config->instance, tx_data, 1); in uart_nxp_s32_fifo_fill()
162 Linflexd_Uart_Ip_AbortSendingData(config->instance); in uart_nxp_s32_irq_tx_disable()
193 Linflexd_Uart_Ip_AbortReceivingData(config->instance); in uart_nxp_s32_irq_rx_disable()
254 Linflexd_Uart_Ip_IRQHandler(config->instance); in uart_nxp_s32_isr()
257 static void uart_nxp_s32_event_handler(const uint8 instance, in uart_nxp_s32_event_handler() argument
272 status = Linflexd_Uart_Ip_GetTransmitStatus(config->instance, NULL); in uart_nxp_s32_event_handler()
321 Linflexd_Uart_Ip_Init(config->instance, &config->hw_cfg); in uart_nxp_s32_init()
[all …]
/drivers/clock_control/
A Dclock_control_mcux_ccm_rev2.c21 uint32_t peripheral, instance; in mcux_ccm_on() local
44 (void)instance; in mcux_ccm_on()
60 uint32_t clock_root, peripheral, instance; in mcux_ccm_get_subsys_rate() local
72 clock_root = kCLOCK_Root_Lpi2c1 + instance; in mcux_ccm_get_subsys_rate()
80 clock_root = kCLOCK_Root_I3c1 + instance; in mcux_ccm_get_subsys_rate()
149 clock_root = kCLOCK_Root_Can1 + instance; in mcux_ccm_get_subsys_rate()
155 clock_root = kCLOCK_Root_Gpt1 + instance; in mcux_ccm_get_subsys_rate()
189 clock_root = kCLOCK_Root_Sai1 + instance; in mcux_ccm_get_subsys_rate()
206 switch (instance) { in mcux_ccm_get_subsys_rate()
256 clock_root = kCLOCK_Root_Bus + instance; in mcux_ccm_get_subsys_rate()
[all …]
A Dclock_control_mcux_ccm.c130 CLOCK_EnableClock(uart_clocks[instance]); in mcux_ccm_on()
140 CLOCK_EnableClock(lpuart_clocks[instance]); in mcux_ccm_on()
149 CLOCK_EnableClock(lpuart_clocks[instance]); in mcux_ccm_on()
158 CLOCK_EnableClock(sai_clocks[instance]); in mcux_ccm_on()
167 CLOCK_EnableClock(esai_clocks[instance]); in mcux_ccm_on()
195 (void)instance; in mcux_ccm_on()
212 CLOCK_DisableClock(uart_clocks[instance]); in mcux_ccm_off()
221 CLOCK_DisableClock(sai_clocks[instance]); in mcux_ccm_off()
230 CLOCK_DisableClock(esai_clocks[instance]); in mcux_ccm_off()
247 (void)instance; in mcux_ccm_off()
[all …]
A Dclock_control_ifx_cat1_fixed_factor_clock.c25 uint32_t instance; member
37 Cy_SysClk_ClkPathSetSource(config->instance, config->source_path); in fixed_factor_clk_init()
41 Cy_SysClk_ClkHfSetSource(config->instance, config->source_instance); in fixed_factor_clk_init()
42 Cy_SysClk_ClkHfSetDivider(config->instance, config->divider); in fixed_factor_clk_init()
43 Cy_SysClk_ClkHfEnable(config->instance); in fixed_factor_clk_init()
57 .instance = DT_INST_PROP(idx, clock_instance), \
/drivers/ethernet/
A Dphy_cyclonev.c93 uint16_t instance, struct eth_cyclonev_priv *p);
244 rc = alt_eth_phy_read_register(instance, PHY_BSR, &rdval, p); in alt_eth_phy_config()
266 rc = alt_eth_phy_write_register(instance, PHY_1GCTL, in alt_eth_phy_config()
278 rc = alt_eth_phy_read_register(instance, PHY_BSR, &rdval, p); in alt_eth_phy_config()
289 rc = alt_eth_phy_read_register(instance, PHY_BCR, &rdval, p); in alt_eth_phy_config()
296 rc = alt_eth_phy_write_register(instance, PHY_BCR, rdval, p); in alt_eth_phy_config()
305 rc = alt_eth_phy_read_register(instance, PHY_BSR, &rdval, p); in alt_eth_phy_config()
310 alt_eth_phy_read_register(instance, PHY_BSR, &rdval, p); in alt_eth_phy_config()
334 rc = alt_eth_phy_read_register(instance, PHY_BCR, &rdval, p); in alt_eth_phy_reset()
350 uint16_t instance, struct eth_cyclonev_priv *p) in alt_eth_phy_get_duplex_and_speed() argument
[all …]
A Deth_nxp_s32_gmac.c39 uint8_t instance; member
118 Gmac_Ip_SetSpeed(cfg->instance, gmac_cfg.Speed); in phy_link_state_changed()
236 Gmac_Ip_EnableController(cfg->instance); in eth_nxp_s32_start()
260 LOG_DBG("GMAC%d started", cfg->instance); in eth_nxp_s32_start()
282 status = Gmac_Ip_DisableController(cfg->instance); in eth_nxp_s32_stop()
288 LOG_DBG("GMAC%d stopped", cfg->instance); in eth_nxp_s32_stop()
542 Gmac_Ip_AddDstAddrToHashFilter(cfg->instance, in eth_nxp_s32_set_config()
545 Gmac_Ip_RemoveDstAddrFromHashFilter(cfg->instance, in eth_nxp_s32_set_config()
585 GMAC_TxIRQHandler(cfg->instance, cfg->tx_ring_idx); in eth_nxp_s32_tx_irq()
592 GMAC_RxIRQHandler(cfg->instance, cfg->rx_ring_idx); in eth_nxp_s32_rx_irq()
[all …]
A Deth_cyclonev.c36 void eth_cyclonev_reset(uint32_t instance);
37 void eth_cyclonev_set_mac_addr(uint8_t *address, uint32_t instance, uint32_t n,
40 int eth_cyclonev_software_reset(uint32_t instance, struct eth_cyclonev_priv *p);
46 int set_mac_conf_status(int instance, uint32_t *mac_config_reg_settings,
76 void eth_cyclonev_reset(uint32_t instance) in eth_cyclonev_reset() argument
90 Sysmgr_Emac_Phy_Intf_Sel_E_Rgmii[instance]); in eth_cyclonev_reset()
123 if (instance > 1) { in eth_cyclonev_set_mac_addr()
155 if (instance > 1) { in eth_cyclonev_get_software_reset_status()
174 if (instance > 1) { in eth_cyclonev_software_reset()
185 if (eth_cyclonev_get_software_reset_status(instance, p) == 0) { in eth_cyclonev_software_reset()
[all …]
/drivers/counter/
A Dcounter_ambiq_timer.c28 uint32_t instance; member
208 am_hal_ctimer_clear(cfg->instance, AM_HAL_CTIMER_BOTH); in counter_ambiq_init()
209 am_hal_ctimer_config(cfg->instance, &sContTimer); in counter_ambiq_init()
221 am_hal_timer_config(cfg->instance, &tc); in counter_ambiq_init()
236 am_hal_ctimer_start(cfg->instance, AM_HAL_CTIMER_TIMERA); in counter_ambiq_start()
238 am_hal_timer_start(cfg->instance); in counter_ambiq_start()
253 am_hal_ctimer_stop(cfg->instance, AM_HAL_CTIMER_BOTH); in counter_ambiq_stop()
255 am_hal_timer_stop(cfg->instance); in counter_ambiq_stop()
273 *ticks = am_hal_timer_read(cfg->instance); in counter_ambiq_get_value()
311 am_hal_timer_compare1_set(cfg->instance, alarm_cfg->ticks); in counter_ambiq_set_alarm()
[all …]
A DKconfig.nrfx19 # Internal flag which detects if PPI wrap feature is enabled for any instance
28 # Internal flag which detects if fixed top feature is enabled for any instance
/drivers/mdio/
A Dmdio_nxp_s32_gmac.c26 uint8_t instance; member
48 Gmac_Ip_EnableMDIO(cfg->instance, cfg->suppress_preamble, data->clock_freq); in mdio_nxp_s32_read_c45()
50 status = Gmac_Ip_MDIOReadMMD(cfg->instance, prtad, devad, regad, regval, in mdio_nxp_s32_read_c45()
68 Gmac_Ip_EnableMDIO(cfg->instance, cfg->suppress_preamble, data->clock_freq); in mdio_nxp_s32_write_c45()
70 status = Gmac_Ip_MDIOWriteMMD(cfg->instance, prtad, devad, regad, regval, in mdio_nxp_s32_write_c45()
88 Gmac_Ip_EnableMDIO(cfg->instance, cfg->suppress_preamble, data->clock_freq); in mdio_nxp_s32_read_c22()
90 status = Gmac_Ip_MDIORead(cfg->instance, prtad, regad, regval, in mdio_nxp_s32_read_c22()
108 Gmac_Ip_EnableMDIO(cfg->instance, cfg->suppress_preamble, data->clock_freq); in mdio_nxp_s32_write_c22()
110 status = Gmac_Ip_MDIOWrite(cfg->instance, prtad, regad, regval, in mdio_nxp_s32_write_c22()
162 .instance = MDIO_NXP_S32_HW_INSTANCE(n), \
A Dmdio_nxp_s32_netc.c19 uint8_t instance; member
34 status = Netc_EthSwt_Ip_ReadTrcvRegister(cfg->instance, prtad, regad, regval); in nxp_s32_mdio_read()
48 status = Netc_EthSwt_Ip_WriteTrcvRegister(cfg->instance, prtad, regad, regval); in nxp_s32_mdio_write()
86 .instance = NXP_S32_MDIO_HW_INSTANCE(n), \
/drivers/mfd/
A Dmfd_nxp_lp_flexcomm.c39 uint32_t instance = LP_FLEXCOMM_GetInstance(config->base); in nxp_lp_flexcomm_isr() local
42 interrupt_status = LP_FLEXCOMM_GetInterruptStatus(instance); in nxp_lp_flexcomm_isr()
88 uint32_t instance; in nxp_lp_flexcomm_init() local
112 instance = LP_FLEXCOMM_GetInstance(config->base); in nxp_lp_flexcomm_init()
115 LP_FLEXCOMM_Init(instance, LP_FLEXCOMM_PERIPH_LPI2CAndLPUART); in nxp_lp_flexcomm_init()
117 LP_FLEXCOMM_Init(instance, LP_FLEXCOMM_PERIPH_LPUART); in nxp_lp_flexcomm_init()
119 LP_FLEXCOMM_Init(instance, LP_FLEXCOMM_PERIPH_LPI2C); in nxp_lp_flexcomm_init()
121 LP_FLEXCOMM_Init(instance, LP_FLEXCOMM_PERIPH_LPSPI); in nxp_lp_flexcomm_init()
/drivers/watchdog/
A Dwdt_iwdg_stm32.c118 LL_IWDG_Enable(cfg->instance); in iwdg_stm32_setup()
119 LL_IWDG_EnableWriteAccess(cfg->instance); in iwdg_stm32_setup()
121 LL_IWDG_SetPrescaler(cfg->instance, data->prescaler); in iwdg_stm32_setup()
122 LL_IWDG_SetReloadCounter(cfg->instance, data->reload); in iwdg_stm32_setup()
127 while (LL_IWDG_IsReady(cfg->instance) == 0) { in iwdg_stm32_setup()
134 LL_IWDG_ReloadCounter(cfg->instance); in iwdg_stm32_setup()
185 LL_IWDG_ReloadCounter(cfg->instance); in iwdg_stm32_feed()
259 .instance = (IWDG_TypeDef *)DT_INST_REG_ADDR(0),
A Dwdt_iwdg_stm32.h25 IWDG_TypeDef *instance; member
/drivers/adc/
A Dadc_nxp_s32_adc_sar.c31 uint8_t instance; member
66 status = Adc_Sar_Ip_Init(config->instance, config->adc_cfg); in adc_nxp_s32_init()
72 status = Adc_Sar_Ip_DoCalibration(config->instance); in adc_nxp_s32_init()
78 Adc_Sar_Ip_EnableNotifications(config->instance, in adc_nxp_s32_init()
200 Adc_Sar_Ip_SetResolution(config->instance, resolution); in adc_nxp_s32_set_resolution()
252 error = Adc_Sar_Ip_DoCalibration(config->instance); in adc_nxp_s32_start_read_async()
267 Adc_Sar_Ip_EnableChannelNotifications(config->instance, in adc_nxp_s32_start_read_async()
269 Adc_Sar_Ip_EnableChannel(config->instance, in adc_nxp_s32_start_read_async()
274 Adc_Sar_Ip_DisableChannel(config->instance, in adc_nxp_s32_start_read_async()
337 Adc_Sar_Ip_IRQHandler(config->instance); in adc_nxp_s32_isr()
[all …]
/drivers/flash/
A Dflash_nxp_s32_qspi.c41 status = Qspi_Ip_GetMemoryStatus(data->instance); in nxp_s32_qspi_wait_until_ready()
77 status = Qspi_Ip_Read(data->instance, (uint32_t)offset, (uint8_t *)dest, in nxp_s32_qspi_read()
118 status = Qspi_Ip_Program(data->instance, (uint32_t)offset, (const uint8_t *)src, in nxp_s32_qspi_write()
132 status = Qspi_Ip_ProgramVerify(data->instance, (uint32_t)offset, in nxp_s32_qspi_write()
176 status = Qspi_Ip_EraseBlock(data->instance, (uint32_t)offset, *erase_size); in nxp_s32_qspi_erase_block()
209 status = Qspi_Ip_EraseChip(data->instance); in nxp_s32_qspi_erase()
229 status = Qspi_Ip_EraseVerify(data->instance, (uint32_t)offset, in nxp_s32_qspi_erase()
276 status = Qspi_Ip_ReadId(data->instance, id); in nxp_s32_qspi_read_id()
A Dflash_nxp_s32_qspi_hyperflash.c33 data->instance = nxp_s32_qspi_register_device(); in nxp_s32_qspi_init()
34 __ASSERT_NO_MSG(data->instance < QSPI_IP_MEM_INSTANCE_COUNT); in nxp_s32_qspi_init()
46 status = Qspi_Ip_Init(data->instance, (const Qspi_Ip_MemoryConfigType *)memory_cfg, in nxp_s32_qspi_init()
49 LOG_ERR("Fail to init memory device %d (%d)", data->instance, status); in nxp_s32_qspi_init()
/drivers/can/
A Dcan_nxp_s32_canxl.c80 uint8 instance; member
241 if (Canexcel_Ip_DeactivateMD(config->instance, in can_nxp_s32_stop()
316 Canexcel_Ip_EnterFreezeMode(config->instance); in can_nxp_s32_set_mode()
336 Canexcel_Ip_ExitFreezeMode(config->instance); in can_nxp_s32_set_mode()
464 Canexcel_Ip_EnterFreezeMode(config->instance); in can_nxp_s32_remove_rx_filter()
468 Canexcel_Ip_ExitFreezeMode(config->instance); in can_nxp_s32_remove_rx_filter()
532 Canexcel_Ip_EnterFreezeMode(config->instance); in can_nxp_s32_add_rx_filter()
565 Canexcel_Ip_ExitFreezeMode(config->instance); in can_nxp_s32_add_rx_filter()
1068 Canexcel_Ip_RxTxIRQHandler(config->instance); in can_nxp_s32_isr_rx_tx_mru()
1072 Canexcel_Ip_MruIRQHandler(config->instance); in can_nxp_s32_isr_rx_tx_mru()
[all …]
/drivers/misc/nxp_s32_emios/
A Dnxp_s32_emios.c20 uint8_t instance; member
29 if (Emios_Mcl_Ip_Init(config->instance, config->mcl_info)) { in nxp_s32_emios_init()
120 .instance = NXP_S32_EMIOS_GET_INSTANCE(n), \
/drivers/pwm/
A Dpwm_nxp_s32_emios.c94 uint8_t instance; member
362 if (eMios_Pwm_Ip_IndexInChState[config->instance][channel] >= in pwm_nxp_s32_set_cycles()
478 if (eMios_Icu_Ip_IndexInChState[config->instance][channel] >= in pwm_nxp_s32_capture_configure()
539 Emios_Icu_Ip_SetActivation(config->instance, channel, edge); in pwm_nxp_s32_capture_enable()
541 Emios_Icu_Ip_EnableNotification(config->instance, channel); in pwm_nxp_s32_capture_enable()
543 Emios_Icu_Ip_StartTimestamp(config->instance, channel, in pwm_nxp_s32_capture_enable()
565 Emios_Icu_Ip_StopTimestamp(config->instance, channel); in pwm_nxp_s32_capture_disable()
619 Emios_Pwm_Ip_InitChannel(config->instance, &pwm_info); in pwm_nxp_s32_pulse_gen_init()
651 if (Emios_Icu_Ip_Init(config->instance, config->icu_cfg)) { in pwm_nxp_s32_pulse_capture_init()
672 Emios_Icu_Ip_GetInputLevel(config->instance, in pwm_nxp_s32_capture_callback()
[all …]
/drivers/memc/
A Dmemc_nxp_s32_qspi.c26 uint8_t instance; member
57 data->instance = get_instance(config->base); in memc_nxp_s32_qspi_init()
63 status = Qspi_Ip_ControllerInit(data->instance, config->controller_cfg); in memc_nxp_s32_qspi_init()
66 data->instance, status); in memc_nxp_s32_qspi_init()
77 return data->instance; in memc_nxp_s32_qspi_get_instance()
/drivers/display/
A DKconfig.nrf_led_matrix17 The driver uses one TIMER instance and, depending on what is set in
18 devicetree, one PWM instance or one or more GPIOTE and PPI channels
/drivers/sensor/ite/ite_vcmp_it8xxx2/
A DKconfig19 int "ITE it8xxx2 voltage comparator device instance init priority"
22 This option sets ITE voltage comparator device instance init priority.

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