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Searched refs:mdio (Results 1 – 25 of 35) sorted by relevance

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/drivers/mdio/
A DKconfig27 source "drivers/mdio/Kconfig.esp32"
28 source "drivers/mdio/Kconfig.sam"
32 source "drivers/mdio/Kconfig.adin2111"
33 source "drivers/mdio/Kconfig.gpio"
34 source "drivers/mdio/Kconfig.litex"
35 source "drivers/mdio/Kconfig.nxp_enet"
37 source "drivers/mdio/Kconfig.xmc4xxx"
39 source "drivers/mdio/Kconfig.dwcxgmac"
41 source "drivers/mdio/Kconfig.lan865x"
42 source "drivers/mdio/Kconfig.sy1xx"
[all …]
A Dmdio_nxp_enet_qos.c50 enet_qos_t *base = mdio->base; in do_transaction()
54 k_mutex_lock(mdio->mdio_bus_mutex, K_FOREVER); in do_transaction()
57 if (mdio->op == MDIO_OP_C45_WRITE) { in do_transaction()
63 } else if (mdio->op == MDIO_OP_C45_READ) { in do_transaction()
73 if (mdio->op == MDIO_OP_C22_WRITE) { in do_transaction()
78 } else if (mdio->op == MDIO_OP_C22_READ) { in do_transaction()
121 if (mdio->op == MDIO_OP_C22_READ || mdio->op == MDIO_OP_C45_READ) { in do_transaction()
122 uint32_t val = mdio->base->MAC_MDIO_DATA; in do_transaction()
124 *mdio->read_data = in do_transaction()
130 k_mutex_unlock(mdio->mdio_bus_mutex); in do_transaction()
[all …]
A Dmdio_esp32.c134 DEVICE_DT_GET(DT_CLOCKS_CTLR(DT_NODELABEL(mdio))); in mdio_esp32_initialize()
136 (clock_control_subsys_t)DT_CLOCKS_CELL(DT_NODELABEL(mdio), offset); in mdio_esp32_initialize()
175 static DEVICE_API(mdio, mdio_esp32_driver_api) = {
A DKconfig.dwcxgmac5 bool "synopsys mdio driver"
A Dmdio_xmc4xxx.c161 port_ctrl.mdio = dev_cfg->mdi_port_ctrl; in mdio_xmc4xxx_initialize()
167 static DEVICE_API(mdio, mdio_xmc4xxx_driver_api) = {
A Dmdio_shell.c20 return DEVICE_API_IS(mdio, dev); in device_is_mdio()
252 SHELL_CMD_REGISTER(mdio, &sub_mdio_cmds, "MDIO commands", NULL);
A Dmdio_lan865x.c55 static DEVICE_API(mdio, mdio_lan865x_api) = {
A Dmdio_nxp_s32_netc.c70 static DEVICE_API(mdio, nxp_s32_mdio_api) = {
A Dmdio_renesas_ra.c106 static DEVICE_API(mdio, renesas_ra_mdio_api) = {
A Dmdio_nxp_imx_netc.c93 static DEVICE_API(mdio, nxp_imx_netc_mdio_api) = {
A Dmdio_stm32_hal.c174 static DEVICE_API(mdio, mdio_stm32_api) = {
A Dmdio_adin2111.c176 static DEVICE_API(mdio, mdio_adin2111_api) = {
A Dmdio_gpio.c160 static DEVICE_API(mdio, mdio_gpio_driver_api) = {
A Dmdio_litex_liteeth.c155 static DEVICE_API(mdio, mdio_litex_driver_api) = {
A Dmdio_sy1xx.c176 static DEVICE_API(mdio, sy1xx_mdio_driver_api) = {
/drivers/ethernet/phy/
A Dphy_dm8806.c24 const struct device *mdio; member
93 res = mdio_write(cfg->mdio, DM8806_SMI_BUS_CTRL_PHY_ADDRESS, in phy_dm8806_write_reg()
102 res = mdio_write(cfg->mdio, phyad, regad, data); in phy_dm8806_write_reg()
114 res = mdio_write(cfg->mdio, DM8806_SMI_BUS_ERR_CHK_PHY_ADDRESS, in phy_dm8806_write_reg()
126 res = mdio_read(cfg->mdio, DM8806_SMI_BUS_ERR_CHK_PHY_ADDRESS, in phy_dm8806_write_reg()
189 res = mdio_write(cfg->mdio, DM8806_SMI_BUS_CTRL_PHY_ADDRESS, in phy_dm8806_read_reg()
198 res = mdio_read(cfg->mdio, phyad, regad, data); in phy_dm8806_read_reg()
205 res = mdio_read(cfg->mdio, DM8806_SMI_BUS_ERR_CHK_PHY_ADDRESS, in phy_dm8806_read_reg()
448 ret = mdio_read(cfg->mdio, port_address, in phy_dm8806_init()
455 ret = mdio_write(cfg->mdio, port_address, in phy_dm8806_init()
[all …]
A Dphy_microchip_t1s.c94 const struct device *mdio; member
115 mdio_bus_enable(cfg->mdio); in phy_mc_t1s_read()
119 mdio_bus_disable(cfg->mdio); in phy_mc_t1s_read()
129 mdio_bus_enable(cfg->mdio); in phy_mc_t1s_write()
133 mdio_bus_disable(cfg->mdio); in phy_mc_t1s_write()
167 mdio_bus_enable(cfg->mdio); in phy_mc_t1s_c45_read()
172 mdio_bus_disable(cfg->mdio); in phy_mc_t1s_c45_read()
178 mdio_bus_disable(cfg->mdio); in phy_mc_t1s_c45_read()
194 mdio_bus_enable(cfg->mdio); in phy_mc_t1s_c45_write()
199 mdio_bus_disable(cfg->mdio); in phy_mc_t1s_c45_write()
[all …]
A Dphy_tja11xx.c31 const struct device *mdio; member
49 return mdio_read(cfg->mdio, cfg->phy_addr, reg, val); in phy_tja11xx_c22_read()
56 return mdio_write(cfg->mdio, cfg->phy_addr, reg, val); in phy_tja11xx_c22_write()
64 mdio_bus_enable(cfg->mdio); in phy_tja11xx_reg_read()
68 mdio_bus_disable(cfg->mdio); in phy_tja11xx_reg_read()
78 mdio_bus_enable(cfg->mdio); in phy_tja11xx_reg_write()
82 mdio_bus_disable(cfg->mdio); in phy_tja11xx_reg_write()
233 .mdio = DEVICE_DT_GET(DT_INST_BUS(n)) \
A Dphy_adin2111.c92 const struct device *mdio; member
114 return mdio_read(cfg->mdio, cfg->phy_addr, reg, val); in phy_adin2111_c22_read()
122 return mdio_write(cfg->mdio, cfg->phy_addr, reg, val); in phy_adin2111_c22_write()
135 rval = mdio_write(cfg->mdio, cfg->phy_addr, ADIN1100_MMD_ACCESS, reg); in phy_adin2111_c45_setup_dev_reg()
159 return mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_adin2111_c45_read()
178 return mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_adin2111_c45_write()
187 mdio_bus_enable(cfg->mdio); in phy_adin2111_reg_read()
191 mdio_bus_disable(cfg->mdio); in phy_adin2111_reg_read()
202 mdio_bus_enable(cfg->mdio); in phy_adin2111_reg_write()
206 mdio_bus_disable(cfg->mdio); in phy_adin2111_reg_write()
[all …]
A Dphy_tja1103.c66 const struct device *mdio; member
87 return mdio_read(cfg->mdio, cfg->phy_addr, reg, val); in phy_tja1103_c22_read()
94 return mdio_write(cfg->mdio, cfg->phy_addr, reg, val); in phy_tja1103_c22_write()
102 return mdio_write_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_tja1103_c45_write()
110 return mdio_read_c45(cfg->mdio, cfg->phy_addr, devad, reg, val); in phy_tja1103_c45_read()
118 mdio_bus_enable(cfg->mdio); in phy_tja1103_reg_read()
122 mdio_bus_disable(cfg->mdio); in phy_tja1103_reg_read()
132 mdio_bus_enable(cfg->mdio); in phy_tja1103_reg_write()
136 mdio_bus_disable(cfg->mdio); in phy_tja1103_reg_write()
420 .mdio = DEVICE_DT_GET(DT_INST_BUS(n)), \
A Dphy_mii.c32 const struct device * const mdio; member
70 if (cfg->mdio == NULL) { in phy_mii_reg_read()
74 return mdio_read(cfg->mdio, cfg->phy_addr, reg_addr, value); in phy_mii_reg_read()
87 if (cfg->mdio == NULL) { in phy_mii_reg_write()
91 return mdio_write(cfg->mdio, cfg->phy_addr, reg_addr, value); in phy_mii_reg_write()
367 if (cfg->mdio == NULL) { in phy_mii_cfg_link()
502 mdio_bus_enable(cfg->mdio); in phy_mii_initialize_dynamic_link()
562 .mdio = UTIL_AND(UTIL_NOT(IS_FIXED_LINK(n)), \
/drivers/ethernet/
A Deth_gecko.c455 for (idx = 0; idx < ARRAY_SIZE(cfg->pin_list->mdio); idx++) { in eth_init_pins()
456 GPIO_PinModeSet(cfg->pin_list->mdio[idx].port, cfg->pin_list->mdio[idx].pin, in eth_init_pins()
457 cfg->pin_list->mdio[idx].mode, cfg->pin_list->mdio[idx].out); in eth_init_pins()
652 .mdio = PIN_LIST_PHY,
660 .pin_list_size = ARRAY_SIZE(pins_eth0.mdio) +
A Deth_gecko_priv.h71 struct soc_gpio_pin mdio[2]; member
A Deth_nxp_enet.c92 const struct device *mdio; member
525 nxp_enet_driver_cb(config->mdio, NXP_ENET_MDIO, NXP_ENET_INTERRUPT_ENABLED, NULL);
589 nxp_enet_driver_cb(config->mdio, NXP_ENET_MDIO, NXP_ENET_INTERRUPT, NULL);
763 nxp_enet_driver_cb(config->mdio, NXP_ENET_MDIO, NXP_ENET_MODULE_RESET, NULL);
987 .mdio = DEVICE_DT_GET(DT_INST_PHANDLE(n, nxp_mdio)), \
/drivers/audio/mic_privacy/intel/
A Dmic_privacy_registers.h105 uint16_t mdio : 1; member

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