1 /*
2 * Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
3 * Copyright 2023 NXP
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 /**
9 * @file
10 * @brief CMSIS extension
11 *
12 * This header provides CMSIS-style register access functions and macros that
13 * are not currently available in the CMSIS.
14 *
15 * NOTE: cmsis.h includes this file; do not manually include this file.
16 */
17
18 #ifndef ZEPHYR_MODULES_CMSIS_CMSIS_A_R_EXT_H_
19 #define ZEPHYR_MODULES_CMSIS_CMSIS_A_R_EXT_H_
20
21 /* FSR Register Definitions */
22 #if defined(CONFIG_AARCH32_ARMV8_R)
23 #define FSR_FS_TRANSLATION_FAULT (4)
24 #define FSR_FS_PERMISSION_FAULT (12)
25 #define FSR_FS_SYNC_EXTERNAL_ABORT (16)
26 #define FSR_FS_ASYNC_EXTERNAL_ABORT (17)
27 #define FSR_FS_SYNC_PARITY_ERROR (24)
28 #define FSR_FS_ASYNC_PARITY_ERROR (25)
29 #define FSR_FS_ALIGNMENT_FAULT (33)
30 #define FSR_FS_DEBUG_EVENT (34)
31 #define FSR_FS_UNSUPPORTED_EXCLUSIVE_ACCESS_FAULT (53)
32 #elif defined(CONFIG_ARMV7_A)
33
34 /**
35 * N.B.: these FSR encodings are only valid when the
36 * Short-descriptor translation table format is used
37 */
38
39 #define FSR_FS_ALIGNMENT_FAULT (1)
40 #define FSR_FS_DEBUG_EVENT (2)
41 #define FSR_FS_ACCESS_FLAG_FAULT_1ST_LEVEL (3)
42 #define FSR_FS_CACHE_MAINTENANCE_INSTRUCTION_FAULT (4)
43 #define FSR_FS_TRANSLATION_FAULT (5)
44 #define FSR_FS_ACCESS_FLAG_FAULT_2ND_LEVEL (6)
45 #define FSR_FS_TRANSLATION_FAULT_2ND_LEVEL (7)
46 #define FSR_FS_SYNC_EXTERNAL_ABORT (8)
47 #define FSR_FS_DOMAIN_FAULT_1ST_LEVEL (9)
48 #define FSR_FS_DOMAIN_FAULT_2ND_LEVEL (11)
49 #define FSR_FS_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_1ST_LEVEL (12)
50 #define FSR_FS_PERMISSION_FAULT (13)
51 #define FSR_FS_SYNC_EXTERNAL_ABORT_TRANSLATION_TABLE_2ND_LEVEL (14)
52 #define FSR_FS_PERMISSION_FAULT_2ND_LEVEL (15)
53 #define FSR_FS_TLB_CONFLICT_ABORT (16)
54 #define FSR_FS_ASYNC_EXTERNAL_ABORT (22)
55 #define FSR_FS_ASYNC_PARITY_ERROR (24)
56 #define FSR_FS_SYNC_PARITY_ERROR (25)
57 #define FSR_FS_SYNC_PARITY_ERROR_TRANSLATION_TABLE_1ST_LEVEL (28)
58 #define FSR_FS_SYNC_PARITY_ERROR_TRANSLATION_TABLE_2ND_LEVEL (30)
59 #else
60 #define FSR_FS_BACKGROUND_FAULT (0)
61 #define FSR_FS_ALIGNMENT_FAULT (1)
62 #define FSR_FS_DEBUG_EVENT (2)
63 #define FSR_FS_SYNC_EXTERNAL_ABORT (8)
64 #define FSR_FS_PERMISSION_FAULT (13)
65 #define FSR_FS_ASYNC_EXTERNAL_ABORT (22)
66 #define FSR_FS_ASYNC_PARITY_ERROR (24)
67 #define FSR_FS_SYNC_PARITY_ERROR (25)
68 #endif
69
70 /* DBGDSCR Register Definitions */
71 #define DBGDSCR_MOE_Pos (2U)
72 #define DBGDSCR_MOE_Msk (0xFUL << DBGDSCR_MOE_Pos)
73
74 #define DBGDSCR_MOE_HALT_REQUEST (0)
75 #define DBGDSCR_MOE_BREAKPOINT (1)
76 #define DBGDSCR_MOE_ASYNC_WATCHPOINT (2)
77 #define DBGDSCR_MOE_BKPT_INSTRUCTION (3)
78 #define DBGDSCR_MOE_EXT_DEBUG_REQUEST (4)
79 #define DBGDSCR_MOE_VECTOR_CATCH (5)
80 #define DBGDSCR_MOE_OS_UNLOCK_CATCH (8)
81 #define DBGDSCR_MOE_SYNC_WATCHPOINT (10)
82
__get_DFAR(void)83 __STATIC_FORCEINLINE uint32_t __get_DFAR(void)
84 {
85 uint32_t result;
86 __get_CP(15, 0, result, 6, 0, 0);
87 return result;
88 }
89
__get_IFAR(void)90 __STATIC_FORCEINLINE uint32_t __get_IFAR(void)
91 {
92 uint32_t result;
93 __get_CP(15, 0, result, 6, 0, 2);
94 return result;
95 }
96
__get_DBGDSCR(void)97 __STATIC_FORCEINLINE uint32_t __get_DBGDSCR(void)
98 {
99 uint32_t result;
100 __get_CP(14, 0, result, 0, 1, 0);
101 return result;
102 }
103
104 #endif /* ZEPHYR_MODULES_CMSIS_CMSIS_A_R_EXT_H_ */
105