1# Memory Protection Unit (MPU) configuration options
2
3# Copyright (c) 2017 Linaro Limited
4# Copyright 2025 Arm Limited and/or its affiliates <open-source-office@arm.com>
5# SPDX-License-Identifier: Apache-2.0
6
7if CPU_HAS_MPU
8
9config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
10	int
11	default 256 if ARM_MPU && ARMV6_M_ARMV8_M_BASELINE && !ARMV8_M_BASELINE
12	default 128 if ARM_MPU && FPU_SHARING && MPU_STACK_GUARD
13	default 64 if ARM_MPU && AARCH32_ARMV8_R
14	default 32 if ARM_MPU
15	default 4
16	help
17	  Minimum size (and alignment) of an ARM MPU region. Use this
18	  symbol to guarantee minimum size and alignment of MPU regions.
19	  A minimum 4-byte alignment is enforced in ARM builds without
20	  support for Memory Protection.
21
22if ARM_MPU
23
24config MPU_STACK_GUARD
25	bool "Thread Stack Guards"
26	help
27	  Enable Thread Stack Guards via MPU
28
29config MPU_STACK_GUARD_MIN_SIZE_FLOAT
30	int
31	depends on MPU_STACK_GUARD
32	depends on FPU_SHARING
33	default 128
34	help
35	  Minimum size (and alignment when applicable) of an ARM MPU
36	  region, which guards the stack of a thread that is using the
37	  Floating Point (FP) context. The width of the guard is set to
38	  128, to accommodate the length of a Cortex-M exception stack
39	  frame when the floating point context is active. The FP context
40	  is only stacked in sharing FP registers mode, therefore, the
41	  option is applicable only when FPU_SHARING is selected.
42
43config MPU_ALLOW_FLASH_WRITE
44	bool "Add MPU access to write to flash"
45	help
46	  Enable this to allow MPU RWX access to flash memory
47
48config MPU_DISABLE_BACKGROUND_MAP
49	bool "Disables the default background address map"
50	help
51	  Enable this to turn off the default background MPU address map. Your
52	  SoC definition should likely provide its own custom MPU regions.
53
54config CUSTOM_SECTION_ALIGN
55	bool "Custom Section Align"
56	help
57	  MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT(ARMv7-M) sometimes cause memory
58	  wasting in linker scripts defined memory sections. Use this symbol
59	  to guarantee user custom section align size to avoid more memory used
60	  for respect alignment. But that needs carefully configure MPU region
61	  and sub-regions(ARMv7-M) to cover this feature.
62
63config CUSTOM_SECTION_MIN_ALIGN_SIZE
64	int "Custom Section Align Size"
65	default 32
66	help
67	  Custom align size of memory section in linker scripts. Usually
68	  it should consume less alignment memory. Although this alignment
69	  size is configured by users, it must also respect the power of
70	  two regulation if hardware requires.
71
72config ARM_MPU_PXN
73	bool
74	default y
75	depends on ARMV8_1_M_MAINLINE
76	help
77	  Enable support for Armv8.1-m MPU's Privileged Execute Never (PXN) attr.
78	  An MPU region marked with PXN attribute can only be executed from an
79	  unprivileged mode and executing such region from privileged mode will
80	  result in a Memory Management fault.
81
82endif # ARM_MPU
83
84endif # CPU_HAS_MPU
85