1 /*
2  * Copyright (c) 2018 Lexmark International, Inc.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief Exception/interrupt context helpers for Cortex-A and Cortex-R CPUs
10  *
11  * Exception/interrupt context helpers.
12  */
13 
14 #ifndef ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_
15 #define ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_
16 
17 #include <zephyr/arch/cpu.h>
18 
19 #ifdef _ASMLANGUAGE
20 
21 /* nothing */
22 
23 #else
24 
25 #include <zephyr/irq_offload.h>
26 
27 #ifdef __cplusplus
28 extern "C" {
29 #endif
30 
31 #ifdef CONFIG_IRQ_OFFLOAD
32 extern volatile irq_offload_routine_t offload_routine;
33 #endif
34 
arch_is_in_isr(void)35 static ALWAYS_INLINE bool arch_is_in_isr(void)
36 {
37 	uint32_t nested;
38 #ifdef CONFIG_SMP
39 	unsigned int key;
40 
41 	key = arch_irq_lock();
42 #endif
43 	nested = arch_curr_cpu()->nested;
44 #ifdef CONFIG_SMP
45 	arch_irq_unlock(key);
46 #endif
47 	return nested != 0U;
48 }
49 
arch_is_in_nested_exception(const struct arch_esf * esf)50 static ALWAYS_INLINE bool arch_is_in_nested_exception(const struct arch_esf *esf)
51 {
52 	return (_current_cpu->arch.exc_depth > 1U) ? (true) : (false);
53 }
54 
55 /**
56  * @brief No current implementation where core dump is not supported
57  *
58  * @param esf exception frame
59  * @param exc_return EXC_RETURN value present in LR after exception entry.
60  */
z_arm_set_fault_sp(const struct arch_esf * esf,uint32_t exc_return)61 static ALWAYS_INLINE void z_arm_set_fault_sp(const struct arch_esf *esf, uint32_t exc_return)
62 {}
63 
64 #if defined(CONFIG_USERSPACE)
65 /*
66  * This function is used by privileged code to determine if the thread
67  * associated with the stack frame is in user mode.
68  */
z_arm_preempted_thread_in_user_mode(const struct arch_esf * esf)69 static ALWAYS_INLINE bool z_arm_preempted_thread_in_user_mode(const struct arch_esf *esf)
70 {
71 	return ((esf->basic.xpsr & CPSR_M_Msk) == CPSR_M_USR);
72 }
73 #endif
74 
75 #ifndef CONFIG_USE_SWITCH
76 extern void z_arm_cortex_r_svc(void);
77 #endif
78 
79 #ifdef __cplusplus
80 }
81 #endif
82 
83 #endif /* _ASMLANGUAGE */
84 
85 #endif /* ZEPHYR_ARCH_ARM_INCLUDE_CORTEX_A_R_EXCEPTION_H_ */
86