1 /*
2  * Copyright (c) 2019 Carlo Caione <ccaione@baylibre.com>
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief Exception/interrupt context helpers for Cortex-A CPUs
10  *
11  * Exception/interrupt context helpers.
12  */
13 
14 #ifndef ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_
15 #define ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_
16 
17 #include <zephyr/arch/cpu.h>
18 
19 #ifdef _ASMLANGUAGE
20 
21 /* nothing */
22 
23 #else
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
arch_is_in_isr(void)29 static ALWAYS_INLINE bool arch_is_in_isr(void)
30 {
31 	uint32_t nested;
32 #ifdef CONFIG_SMP
33 	unsigned int key;
34 
35 	key = arch_irq_lock();
36 #endif
37 	nested = arch_curr_cpu()->nested;
38 #ifdef CONFIG_SMP
39 	arch_irq_unlock(key);
40 #endif
41 	return nested != 0U;
42 }
43 
44 #ifdef __cplusplus
45 }
46 #endif
47 
48 #endif /* _ASMLANGUAGE */
49 
50 #endif /* ZEPHYR_ARCH_ARM64_INCLUDE_EXCEPTION_H_ */
51