1/*
2 * Copyright (c) 2022 Benjamin Björnsson <benjamin.bjornsson@gmail.com>.
3 * Copyright (c) 2024 DNDG srl
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/dts-v1/;
9#include <st/h7/stm32h747Xi_m7.dtsi>
10#include <st/h7/stm32h747xihx-pinctrl.dtsi>
11#include <zephyr/dt-bindings/input/input-event-codes.h>
12#include "arduino_opta-common.dtsi"
13
14/ {
15	model = "Arduino OPTA M7 core Programmable Logic Controller";
16	compatible = "arduino,opta-m7";
17
18	chosen {
19		zephyr,sram = &sram0;
20		zephyr,flash = &flash0;
21		zephyr,code-partition = &slot0_partition;
22		zephyr,bt-hci = &bt_hci_uart;
23	};
24};
25
26zephyr_udc0: &usbotg_fs {
27	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
28	pinctrl-names = "default";
29	status = "okay";
30};
31
32#include <../boards/common/usb/cdc_acm_serial.dtsi>
33
34&clk_hse {
35	clock-frequency = <DT_FREQ_M(25)>;
36	hse-bypass;
37	status = "okay";
38};
39
40&clk_lse {
41	clock-frequency = <32768>;
42	lse-bypass;
43	status = "okay";
44};
45
46&clk_hsi {
47	hsi-div = <1>;
48	status = "okay";
49};
50
51&clk_hsi48 {
52	/* HSI48 required for USB */
53	status = "okay";
54};
55
56&pll {
57	div-m = <5>;
58	mul-n = <160>;
59	div-p = <2>;
60	div-r = <2>;
61	div-q = <10>;
62	clocks = <&clk_hse>;
63	status = "okay";
64};
65
66&rcc {
67	clocks = <&pll>;
68	clock-frequency = <DT_FREQ_M(400)>;
69};
70
71&flash0 {
72	partitions {
73		compatible = "fixed-partitions";
74		#address-cells = <1>;
75		#size-cells = <1>;
76
77		boot_partition: partition@0 {
78			label = "mcu-boot";
79			reg = <0x00000000 DT_SIZE_K(256)>;
80			read-only;
81		};
82
83		slot0_partition: partition@40000 {
84			label = "image-0";
85			reg = <0x00040000 DT_SIZE_K(768)>;
86		};
87	};
88};
89
90/* Assign USB to M7 by default */
91&usbotg_fs {
92	status = "okay";
93};
94
95&usbotg_hs {
96	status = "disabled";
97};
98
99/* Assign ethernet to M7 by default */
100&mac {
101	pinctrl-0 = <
102		&eth_ref_clk_pa1
103		&eth_crs_dv_pa7
104		&eth_rxd0_pc4
105		&eth_rxd1_pc5
106		&eth_tx_en_pg11
107		&eth_txd1_pg12
108		&eth_txd0_pg13
109	>;
110	pinctrl-names = "default";
111	phy-connection-type = "rmii";
112	phy-handle = <&eth_phy>;
113	status = "okay";
114};
115
116&mdio {
117	pinctrl-0 = <&eth_mdio_pa2 &eth_mdc_pc1>;
118	pinctrl-names = "default";
119	status = "okay";
120
121	eth_phy: ethernet-phy@0 {
122		compatible = "ethernet-phy";
123		reg = <0x00>;
124	};
125};
126
127/* Assign Bluetooth to M7 by default */
128&uart4 {
129	pinctrl-0 = <
130		&uart4_tx_pb9
131		&uart4_rx_ph14
132		&uart4_cts_pb15
133		&uart4_rts_pa15
134	>;
135	pinctrl-names = "default";
136	current-speed = <115200>;
137	hw-flow-control;
138	status = "okay";
139
140	bt_hci_uart: bt_hci_uart {
141		compatible = "zephyr,bt-hci-uart";
142		status = "okay";
143
144		murata-1dx {
145			compatible = "infineon,cyw43xxx-bt-hci";
146			bt-reg-on-gpios = <&gpioj 12 GPIO_ACTIVE_HIGH>;
147			bt-host-wake-gpios = <&gpioj 13 GPIO_ACTIVE_HIGH>;
148			bt-dev-wake-gpios = <&gpioj 14 GPIO_ACTIVE_HIGH>;
149		};
150	};
151};
152
153/* Assign external flash to M7 by default */
154&quadspi {
155	pinctrl-0 = <
156		&quadspi_bk1_io0_pd11
157		&quadspi_bk1_io1_pd12
158		&quadspi_bk1_io2_pe2
159		&quadspi_bk1_io3_pd13
160		&quadspi_bk1_ncs_pg6
161		&quadspi_clk_pb2
162	>;
163	pinctrl-names = "default";
164	status = "okay";
165
166	qspi_flash: qspi-nor-flash@0 {
167		compatible = "st,stm32-qspi-nor";
168		reg = <0>;
169		size = <DT_SIZE_M(128)>; /* 128 MBits */
170		qspi-max-frequency = <80000000>;
171		jedec-id = [01 1f 89];
172		spi-bus-width = <4>;
173		quad-enable-requirements = "NONE";
174		status = "okay";
175
176		/* The following partitions are valid only if the Opta external flash
177		 * has never been reformatted or repartitioned. Note the offset of the
178		 * first partition, due to the presence of the MBR.
179		 */
180		partitions {
181			compatible = "fixed-partitions";
182			#address-cells = <1>;
183			#size-cells = <1>;
184
185			/* WiFi firmware and TLS certificates: 1MB - 4K for MBR using LBA */
186			wlan_partition: partition@1000 {
187				label = "wlan";
188				reg=<0x001000 DT_SIZE_K(1020)>;
189			};
190
191			/* Arduino OTA partition: 13MB */
192			fs_partition: partition@100000 {
193				label = "fs";
194				reg=<0x100000 DT_SIZE_M(13)>;
195			};
196
197			/* The final 2MB is used to keep a memory-mapped copy of the WiFi
198			 * firmware. The address of the firmware blob is 0xF80000 and the
199			 * size of the partition in the MBR is 0 but, given that we can't
200			 * specify a zero size in `reg` we just give the "correct" one.
201			 */
202			wifi_partition: partition@e00000 {
203				label = "4343WA1";
204				reg=<0xE00000 DT_SIZE_M(2)>;
205			};
206		};
207	};
208};
209