1.. _mps2_armv7m_board:
2
3ARM V2M MPS2 Armv7-m (AN385/AN386/AN500)
4########################################
5
6Overview
7********
8
9The ``mps2/an385``, ``mps2/an386``, and ``mps2/an500`` board targets are three of
10the mps2 Armv7-m based board targets supported in Zephyr. This document
11provides details about the support provided for these three Armv7-m mps2 board targets
12(**AN385**, **AN386**, **AN500**) and the following devices:
13
14- Nested Vectored Interrupt Controller (NVIC)
15- System Tick System Clock (SYSTICK)
16- Cortex-M System Design Kit UART
17
18.. image:: img/mps2.jpg
19     :align: center
20     :alt: ARM V2M MPS2
21
22In addition to enabling actual hardware usage, these board targets can
23also use `FVP`_ to emulate the platforms running on the MPS2+.
24
25More information about the board can be found at the `V2M MPS2 Website`_.
26
27The application note for each of the board can be found as follows:
28
29- AN385 can be found at `Application Note AN385`_
30- AN386 can be found at `Application Note AN386`_
31- AN500 can be found at `Application Note AN500`_
32
33AN385 is also supported to run with QEMU, and is set to run with QEMU by default.
34
35.. note::
36   These board targets makes no claims about its suitability for use
37   with actual MPS2 hardware systems, or any other hardware
38   system.
39
40Hardware
41********
42
43ARM V2M MPS2 provides the following hardware components:
44
45- ARM Cortex-M Chip
46- ARM IoT Subsystem for Cortex-M
47- Form factor: 140x120cm
48- ZBTSRAM: 8MB single cycle SRAM, 16MB PSRAM
49- Video: QSVGA touch screen panel, 4bit RGB VGA connector
50- Audio: Audio Codec
51- Debug:
52
53  - ARM JTAG20 connector
54  - ARM parallel trace connector (MICTOR38)
55  - 20 pin Cortex debug connector
56  - 10 pin Cortex debug connector
57  - ILA connector for FPGA debug
58
59- Expansion
60
61  - GPIO
62  - SPI
63
64.. note::
65   4 MB of flash memory (in ZBTSRAM 1, starting at address 0x00400000) and 4 MB of RAM
66   (in ZBTSRAM 2 & 3, starting at address 0x20000000) are available.
67
68Supported Features
69==================
70
71The ``mps2/an385``, ``mps2/an386``, and ``mps2/an500`` board targets support the following hardware features:
72
73+-----------+------------+-------------------------------------+
74| Interface | Controller | Driver/Component                    |
75+===========+============+=====================================+
76| NVIC      | on-chip    | nested vector interrupt controller  |
77+-----------+------------+-------------------------------------+
78| SYSTICK   | on-chip    | systick                             |
79+-----------+------------+-------------------------------------+
80| UART      | on-chip    | serial port-polling;                |
81|           |            | serial port-interrupt               |
82+-----------+------------+-------------------------------------+
83| GPIO      | on-chip    | gpio                                |
84+-----------+------------+-------------------------------------+
85| WATCHDOG  | on-chip    | watchdog                            |
86+-----------+------------+-------------------------------------+
87| TIMER     | on-chip    | counter                             |
88+-----------+------------+-------------------------------------+
89| DUALTIMER | on-chip    | counter                             |
90+-----------+------------+-------------------------------------+
91
92Other hardware features are not currently supported by the port.
93See the `V2M MPS2 Website`_ for a complete list of V2M MPS2 board hardware
94features.
95
96The default configuration can be found in
97:zephyr_file:`boards/arm/mps2/mps2_an385_defconfig`
98or similarly in ``mps2_anxxx_defconfig`` for the other applicable boards.
99
100Interrupt Controller
101====================
102
103MPS2 is a Cortex-M based SoC and has 15 fixed exceptions and 45 IRQs.
104
105A Cortex-M3/4/7-based board uses vectored exceptions. This means each exception
106calls a handler directly from the vector table.
107
108Handlers are provided for exceptions 1-6, 11-12, and 14-15. The table here
109identifies the handlers used for each exception.
110
111+------+------------+----------------+--------------------------+
112| Exc# | Name       | Remarks        | Used by Zephyr Kernel    |
113+======+============+================+==========================+
114| 1    | Reset      |                | system initialization    |
115+------+------------+----------------+--------------------------+
116| 2    | NMI        |                | system fatal error       |
117+------+------------+----------------+--------------------------+
118| 3    | Hard fault |                | system fatal error       |
119+------+------------+----------------+--------------------------+
120| 4    | MemManage  | MPU fault      | system fatal error       |
121+------+------------+----------------+--------------------------+
122| 5    | Bus        |                | system fatal error       |
123+------+------------+----------------+--------------------------+
124| 6    | Usage      | undefined      | system fatal error       |
125|      | fault      | instruction,   |                          |
126|      |            | or switch      |                          |
127|      |            | attempt to ARM |                          |
128|      |            | mode           |                          |
129+------+------------+----------------+--------------------------+
130| 11   | SVC        |                | system calls, kernel     |
131|      |            |                | run-time exceptions,     |
132|      |            |                | and IRQ offloading       |
133+------+------------+----------------+--------------------------+
134| 12   | Debug      |                | system fatal error       |
135|      | monitor    |                |                          |
136+------+------------+----------------+--------------------------+
137| 14   | PendSV     |                | context switch           |
138+------+------------+----------------+--------------------------+
139| 15   | SYSTICK    |                | system clock             |
140+------+------------+----------------+--------------------------+
141
142Pin Mapping
143===========
144
145The ARM V2M MPS2 Board has 4 GPIO controllers. These controllers are responsible
146for pin muxing, input/output, pull-up, etc.
147
148All GPIO controller pins are exposed via the following sequence of pin numbers:
149
150- Pins 0 - 15 are for GPIO 0
151- Pins 16 - 31 are for GPIO 1
152- Pins 32 -  47 are for GPIO 2
153- Pins 48 -  51 are for GPIO 3
154
155Mapping from the ARM MPS2 Board pins to GPIO controllers:
156
157.. rst-class:: rst-columns
158
159   - D0 : EXT_0
160   - D1 : EXT_4
161   - D2 : EXT_2
162   - D3 : EXT_3
163   - D4 : EXT_1
164   - D5 : EXT_6
165   - D6 : EXT_7
166   - D7 : EXT_8
167   - D8 : EXT_9
168   - D9 : EXT_10
169   - D10 : EXT_12
170   - D11 : EXT_13
171   - D12 : EXT_14
172   - D13 : EXT_11
173   - D14 : EXT_15
174   - D15 : EXT_5
175   - D16 : EXT_16
176   - D17 : EXT_17
177   - D18 : EXT_18
178   - D19 : EXT_19
179   - D20 : EXT_20
180   - D21 : EXT_21
181   - D22 : EXT_22
182   - D23 : EXT_23
183   - D24 : EXT_24
184   - D25 : EXT_25
185   - D26 : EXT_26
186   - D27 : EXT_30
187   - D28 : EXT_28
188   - D29 : EXT_29
189   - D30 : EXT_27
190   - D31 : EXT_32
191   - D32 : EXT_33
192   - D33 : EXT_34
193   - D34 : EXT_35
194   - D35 : EXT_36
195   - D36 : EXT_38
196   - D37 : EXT_39
197   - D38 : EXT_40
198   - D39 : EXT_44
199   - D40 : EXT_41
200   - D41 : EXT_31
201   - D42 : EXT_37
202   - D43 : EXT_42
203   - D44 : EXT_43
204   - D45 : EXT_45
205   - D46 : EXT_46
206   - D47 : EXT_47
207   - D48 : EXT_48
208   - D49 : EXT_49
209   - D50 : EXT_50
210   - D51 : EXT_51
211
212Peripheral Mapping:
213
214.. rst-class:: rst-columns
215
216   - UART_3_RX : D0
217   - UART_3_TX : D1
218   - SPI_3_CS : D10
219   - SPI_3_MOSI : D11
220   - SPI_3_MISO : D12
221   - SPI_3_SCLK : D13
222   - I2C_3_SDA : D14
223   - I2C_3_SCL : D15
224   - UART_4_RX : D26
225   - UART_4_TX : D30
226   - SPI_4_CS : D36
227   - SPI_4_MOSI : D37
228   - SPI_4_MISO : D38
229   - SPI_4_SCK : D39
230   - I2C_4_SDA : D40
231   - I2C_4_SCL : D41
232
233For more details please refer to `MPS2 Technical Reference Manual (TRM)`_.
234
235System Clock
236============
237
238The V2M MPS2 main clock is 24 MHz.
239
240Serial Port
241===========
242
243The V2M MPS2 processor has five UARTs. Both the UARTs have only two wires for
244RX/TX and no flow control (CTS/RTS) or FIFO. The Zephyr console output, by
245default, is utilizing UART0.
246
247Programming and Debugging
248*************************
249
250Flashing
251========
252
253V2M MPS2 provides:
254
255- A USB connection to the host computer, which exposes a Mass Storage and an
256  USB Serial Port.
257- A Serial Flash device, which implements the USB flash disk file storage.
258- A physical UART connection which is relayed over interface USB Serial port.
259
260Flashing an application to V2M MPS2
261-----------------------------------
262
263Here is an example for the :zephyr:code-sample:`hello_world` application with AN385.
264
265.. zephyr-app-commands::
266   :zephyr-app: samples/hello_world
267   :board: mps2/an385
268   :goals: build
269
270Connect the V2M MPS2 to your host computer using the USB port and you should
271see a USB connection which exposes a Mass Storage and a USB Serial Port.
272Copy the generated zephyr.bin in the exposed drive.
273Reset the board and you should be able to see on the corresponding Serial Port
274the following message:
275
276.. code-block:: console
277
278   Hello World! arm
279
280Running an applicatoin with FVP
281-------------------------------
282
283Here is the same example for running with FVP.
284Set the ``ARMFVP_BIN_PATH`` environemnt variable to the location of your FVP you have downloaded from `here <FVP_>`_
285
286.. code-block:: console
287
288    export ARMFVP_BIN_PATH=/home/../FVP_MPS2/
289
290Then build with the same command you would use normally, and run with ``west build -t run_armfvp``.
291
292.. _V2M MPS2 Website:
293   https://developer.mbed.org/platforms/ARM-MPS2/
294
295.. _MPS2 Technical Reference Manual (TRM):
296   https://developer.arm.com/documentation/100112/0200/
297
298.. _Application Note AN385:
299   https://documentation-service.arm.com/static/5ed107a5ca06a95ce53f89e3
300
301.. _Application Note AN386:
302   https://documentation-service.arm.com/static/5ed1094dca06a95ce53f8a9f
303
304.. _Application Note AN500:
305   https://documentation-service.arm.com/static/5ed112fcca06a95ce53f8eb3
306
307.. _FVP:
308   https://developer.arm.com/downloads/view/FMFVP
309