1.. zephyr:board:: intel_btl_s_crb
2
3Overview
4********
5Bartlett Lake processor is a 64-bit multi-core processor built on Intel 7 process
6Technology. Bartlett Lake is based on a Hybrid architecture, utilizing
7P-cores for performance and E-Cores for efficiency.
8
9The S-Processor line is a 2-Chip Platform that includes the Processor Die and
10Platform Controller Hub (PCH-S) Die in the Package.
11
12For more information about Raptor Lake Processor lines, P-cores, and E-cores
13please refer to `BTL`_.
14
15This board configuration enables kernel support for the Bartlett Lake S boards.
16
17Hardware
18********
19
20.. zephyr:board-supported-hw::
21
22General information about the board can be found at the `BTL`_ website.
23
24Connections and IOs
25===================
26
27Refer to the `BTL`_ website for more information.
28
29Programming and Debugging
30*************************
31Use the following procedures for booting an image for an Bartlett Lake S CRB board.
32
33.. contents::
34   :depth: 1
35   :local:
36   :backlinks: top
37
38Build Zephyr application
39========================
40
41#. Build a Zephyr application; for instance, to build the ``hello_world``
42   application for Bartlett Lake S CRB:
43
44   .. zephyr-app-commands::
45      :zephyr-app: samples/hello_world
46      :board: intel_btl_s_crb
47      :goals: build
48
49   .. note::
50
51      A Zephyr EFI image file named :file:`zephyr.efi` is automatically
52      created in the build directory after the application is built.
53
54.. include:: ../../../intel/common/efi_boot.rst
55   :start-after: start_include_here
56
57.. _BTL: https://www.intel.com/content/www/us/en/secure/content-details/839635/bartlett-lake-s-processor-external-design-specification-eds-for-edge-platforms.html?DocID=839635
58