1/*
2 * Copyright (c) 2025 Intel Corporation
3 * SPDX-License-Identifier: Apache-2.0
4 */
5
6/dts-v1/;
7
8#include <mem.h>
9
10#define DT_DRAM_SIZE		DT_SIZE_M(2048)
11
12#include <intel/bartlett_lake_s.dtsi>
13
14/ {
15	model = "intel_btl_s_crb";
16	compatible = "intel,bartlett-lake-crb";
17
18	chosen {
19		zephyr,sram = &dram0;
20		zephyr,console = &uart_ec_0;
21		zephyr,shell-uart = &uart_ec_0;
22	};
23
24	aliases {
25		watchdog0 = &tco_wdt;
26		rtc = &rtc;
27	};
28};
29
30&uart_ec_0 {
31	status = "okay";
32};
33
34&rtc {
35	status = "okay";
36};
37