1 /* 2 * Copyright 2020-2022 NXP 3 * All rights reserved. 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 #include "flash_config.h" 8 9 /* Component ID definition, used by tools. */ 10 #ifndef FSL_COMPONENT_ID 11 #define FSL_COMPONENT_ID "platform.drivers.flash_config" 12 #endif 13 14 #if defined(BOOT_HEADER_ENABLE) && (BOOT_HEADER_ENABLE == 1) 15 #if defined(__ARMCC_VERSION) || defined(__GNUC__) 16 __attribute__((section(".flash_conf"), used)) 17 #elif defined(__ICCARM__) 18 #pragma location = ".flash_conf" 19 #endif 20 21 const flexspi_nor_config_t flexspi_config = { 22 .memConfig = { 23 .tag = FLASH_CONFIG_BLOCK_TAG, 24 .version = FLASH_CONFIG_BLOCK_VERSION, 25 .csHoldTime = 3, 26 .csSetupTime = 3, 27 .deviceModeCfgEnable = 1, 28 .deviceModeType = kDeviceConfigCmdType_Generic, 29 .waitTimeCfgCommands = 1, 30 .deviceModeSeq = { 31 .seqNum = 1, 32 /* See Lookup table for more details */ 33 .seqId = 6, 34 .reserved = 0, 35 }, 36 .deviceModeArg = 0, 37 .configCmdEnable = 1, 38 .configModeType = {kDeviceConfigCmdType_Generic, 39 kDeviceConfigCmdType_Spi2Xpi, 40 kDeviceConfigCmdType_Generic}, 41 .configCmdSeqs = { 42 { 43 .seqNum = 1, 44 .seqId = 7, 45 .reserved = 0, 46 }, 47 { 48 .seqNum = 1, 49 .seqId = 10, 50 .reserved = 0, 51 } 52 }, 53 .configCmdArgs = {0x2, 0x1}, 54 .controllerMiscOption = 55 1u << kFlexSpiMiscOffset_SafeConfigFreqEnable, 56 .deviceType = 0x1, 57 .sflashPadType = kSerialFlash_8Pads, 58 .serialClkFreq = kFlexSpiSerialClk_SDR_48MHz, 59 .sflashA1Size = 0, 60 .sflashA2Size = 0, 61 .sflashB1Size = 0x4000000U, 62 .sflashB2Size = 0, 63 .lookupTable = { 64 /* Read */ 65 [0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 66 0xEC, CMD_SDR, FLEXSPI_8PAD, 0x13), 67 [1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 0x20, 68 DUMMY_SDR, FLEXSPI_8PAD, 0x14), 69 [2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_8PAD, 0x04, 70 STOP_EXE, FLEXSPI_1PAD, 0x00), 71 72 /* Read status SPI */ 73 [4 * 1 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 74 0x05, READ_SDR, FLEXSPI_1PAD, 0x04), 75 76 /* Read Status OPI */ 77 [4 * 2 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 78 0x05, CMD_SDR, FLEXSPI_8PAD, 0xFA), 79 [4 * 2 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 80 0x20, DUMMY_SDR, FLEXSPI_8PAD, 0x14), 81 [4 * 2 + 2] = FLEXSPI_LUT_SEQ(READ_SDR, FLEXSPI_8PAD, 82 0x04, STOP_EXE, FLEXSPI_1PAD, 0x00), 83 84 /* Write Enable */ 85 [4 * 3 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 86 0x06, STOP_EXE, FLEXSPI_1PAD, 0x00), 87 88 /* Write Enable - OPI */ 89 [4 * 4 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 90 0x06, CMD_SDR, FLEXSPI_8PAD, 0xF9), 91 92 /* Erase Sector */ 93 [4 * 5 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 94 0x21, CMD_SDR, FLEXSPI_8PAD, 0xDE), 95 [4 * 5 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 96 0x20, STOP_EXE, FLEXSPI_1PAD, 0x00), 97 98 /* Configure dummy cycles */ 99 [4 * 6 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 100 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00), 101 [4 * 6 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 102 0x00, CMD_SDR, FLEXSPI_1PAD, 0x03), 103 [4 * 6 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 104 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01), 105 106 /* Configure Register */ 107 [4 * 7 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 108 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00), 109 [4 * 7 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 110 0x00, CMD_SDR, FLEXSPI_1PAD, 0x02), 111 [4 * 7 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 112 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01), 113 114 /* Erase Block */ 115 [4 * 8 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 116 0xDC, CMD_SDR, FLEXSPI_8PAD, 0x23), 117 [4 * 8 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 118 0x20, STOP_EXE, FLEXSPI_1PAD, 0x00), 119 120 /* Page program */ 121 [4 * 9 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 122 0x12, CMD_SDR, FLEXSPI_8PAD, 0xED), 123 [4 * 9 + 1] = FLEXSPI_LUT_SEQ(RADDR_SDR, FLEXSPI_8PAD, 124 0x20, WRITE_SDR, FLEXSPI_8PAD, 0x04), 125 126 /* Enable OPI STR mode */ 127 [4 * 10 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 128 0x72, CMD_SDR, FLEXSPI_1PAD, 0x00), 129 [4 * 10 + 1] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 130 0x00, CMD_SDR, FLEXSPI_1PAD, 0x00), 131 [4 * 10 + 2] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 132 0x00, WRITE_SDR, FLEXSPI_1PAD, 0x01), 133 134 /* Erase Chip */ 135 [4 * 11 + 0] = FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_8PAD, 136 0x60, CMD_SDR, FLEXSPI_8PAD, 0x9F), 137 }, 138 }, 139 .pageSize = 0x100, 140 .sectorSize = 0x1000, 141 .ipcmdSerialClkFreq = 1u, 142 .serialNorType = 2u, 143 .blockSize = 0x10000, 144 .flashStateCtx = 0x07008100u, 145 }; 146 147 #endif /* BOOT_HEADER_ENABLE */ 148